ADPD188BI

The LED period, and sleep time are managed by the 32kHz clock.  The LED offset and width are managed by the 32MHz clock.  See "Clocks and Timing Calibration" section in the datasheet.  Here you will find a detailed step-by-step instruction set that will guide you through this step.  Once these are done, the widths and offset will match the setting.

If you are using ADI wavetool software, go up to the "clock" icon and calibrate both clocks.  If you are using the CN0537 evaluation platform, the clock calibration should be part of the initialization process.

I calibrated the clocks using efuse data registers. 

First LED pulse setting

Led offset = 32µs

Led period = 15µs

Led pulse width = 3µs

number of LED pulses = 4

AFE width = 4µs

AFE offset = 23.5µs

sampling frequency = 16Hz

Second LED pulse setting

Led offset = 23µs

Led period = 19µs

Led pulse width = 3µs

number of LED pulses = 8

AFE width = 4µs

AFE offset = 11.75µs

sampling frequency = 16Hz

The PTR calculated from the digital counts of both the Led pulse setting is different.

The PTR correction needs to be applied before clock calibration.  The PTR values are measured at test with the non-calibrated clocks.

I am also a little confuse by the above.  When you refer to the "first LED pulse" and the "second LED pulse" are you reference separate units with the same settings giving you different results or are these different LED time slots. Does the calibration appear functional?

Are you able to use the CN0537 clock calibration procedure or wavetool?  These utilities don't use the effuse number to calibrate the clock.  It would be good to see if after using the method in these tools if your offsets are more accurate.  Can you proved the pseudo code for how you are presently calibrating

The LED pulse setting which I mentioned are two separate settings which gives me different results. I followed the calibration from AN-2033. I calibrated using the following procedure

1. Set Register 0x4B, Bit 7 = 1 to enable the 32 kHz oscillator.

2. Write 0x1 to Register 0x10 to force the device into program (idle) mode.

3. Write 0x1 to Register 0x5F to enable the 32 MHz first in, first out (FIFO) clock.

4. Write 0x7 to Register 0x57 to enable access to the eFuse registers.

5. Read Register 0x67. When Register 0x67 = 0x04, the refresh of the eFuse registers is complete, and they are ready to be accessed for reading.

6. Apply the error correction code (ECC) function to the eFuse data before applying the calibration coefficients (see the Using ECC to Detect and Correct Errors in EFUSE Values section).

7. Confirm that the contents of Register 0x70 are 0x1E, 0x1F, 0x21, or greater for Module ID 30, Module ID 31, Module ID 33, or greater respectively.

8. To calibrate the clock, for devices with Module ID = 33, read the eFuse registers (Register 0x77 and Register 0x78) and write those values into the device registers (Register 0x4B and Register 0x4D, respectively.

9. When reading of the eFuse registers is complete, disable the eFuse registers as follows:    a. Write 0x0 to Register 0x57 to disable access to the eFuse registers

                b. Write 0x0 to Register 0x5F to disable the 32 MHz FIFO clock.