How to calculate the sampling frequency/rate from ADPD4100 in different modes (analog integration, digital integration and other modes)

I want to know whats the maximum sampling frequency can be set in ADPD 4100. how the sampling frequency changes with different usage of timeslots, channels, etc. How to calculate the sampling frequency?

How to set the duty cycles for LEDs with the ADPD 4100 in different modes and what are parameters needed to set certain duty cycle.

  • 0
    •  Analog Employees 
    on Jul 19, 2021 6:53 PM

    Hi there,

    You can set your sampling rate in register 0x000D. If the timeslot(s) operation takes longer time than the sampling period, the ADPD4100 part overrides the sampling rate setting with the calculated sampling rate. For instance, you set the sampling rate at 1 kHz, but your time slots operation takes 2 ms, the actual sampling rate will be around 500 Hz.

    Regarding the duty cycles for LEDs, you can calculate it from the LED pulse width setting in register 0x0109/0x0129/... and the period of the specified in registers 0x0108/0x0128/... bit[9:0]. If you set register 0x0108/0x0128/... the minimal period, the minimal period is calculated with formula on page. 29 of the ADPD4100 datasheet. Please refer to Figure 35 on page 30 for the timing diagram of a timeslot operation.

    Regards,

    Glen B.  

  • Hi,

    Thanks for the swift reply. I am still confused with sampling frequency(fs). if I am getting a signal from AFE in the units of ADC counts. I want the data to be represented in terms of seconds/minutes for that I need to know the sampling frequency. and how the sampling frequency changes with timeslots, no of channels used? for example, I am switching 1 LED and more than 4 photodiodes for getting a output signal.

  • 0
    •  Analog Employees 
    on Jul 22, 2021 7:29 PM in reply to ansvitalz

    Hi there,

    The number the pulse for individual timeslot, the number of timeslots, and the number of channels determine how long it takes to finish a data acquisition cycle and hence the maximal sampling frequency you can achieve.

    Your follow-up question is on the time stamp of the samples. Once you set the register 0x000D (assuming it is below the maximum sampling frequency), the actual sampling rate will be close to your targeted frequency. You can trim register 0x0009 and 0x000B to achieve accurate sampling frequency. You can add the time stamp and associate it with the sample when you read the FIFO.

    Regards,

    Glen B.