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ADPD105 TIA ADC mode configuration


I have an EVAL-ADPD105Z-GEN kit with me.

I have tested and obtained a fairly noise-free PPG from the EVAL board. However, I would like to use the TIA ADC MODE of the ADPD105 with the input to the trans-impedance amplifier as a sine wave.

The connections that I made are:

--> Function generator positive to PD1-2 pin with a 100 kilo ohm resistor in series to prevent the TIA from saturating

--> Function generator negative to PDC

--> I am giving a 1V peak-to-peak sine wave as the function generator output.

--> To bypass the band-pass filter, I am using the ADPD OpenMarket Wavetool to write the values 0xAE65 to the register 0x43 and 0x45 (register values have been taken according to the datasheet's specifications).

--> I am also writing 0x1CB6 to the registers 0x42 and 0x44 in order to configure the integrator as an inverting buffer (again according to the datasheet's specifications).

After performing the above steps, I find that the I am getting no output on the Graph View of the ADPD OpenMarket Wavetool.

Any help with this would be greatly appreciated.

  • Hello,

    With the configuration you're talking about you are converting the FG voltage output to a current through a 100k resistor. The side of the resistor that is connected to the PD input to the ADPD105 will be biased at whatever you set the TIA VBIAS to using register 0x42[5:4] and 0x44[5:4]. I would recommend using the 0.9V setting (0x42[5:4] = 0x44[5:4] = 0x2) which places the bias at mid-scale. Then you need to center your sine wave at that bias voltage.



  • Hello Kevin,

    Thanks for answering my question. Configuring registers 0x42 and 0x44 with 0x2 did the trick! I am able to see a sinusoidal wave on the Graph View of the WaveTool.

    However, I do have another question. In the datasheet, the maximum sampling frequency mentioned is 3820Hz and it has also been mentioned that the sampling frequency varies with respect to the LED_OFFSET parameter and the LED_PERIOD parameter. When I use the settings and register values mentioned in my first post (combined with the modifications suggested by you) and save the data from the WaveTool, I only see a maximum of 500 samples per second.

    I have tried disabling the LED by writing 0x0300 to register 0x32. I also tried changing the last byte of register 0x14 to 0x0 (instead of the default 0x5). These changes however have not effect on the sampling frequency. How do I increase the sampling frequency to a value above 3000?



  • Hi Ganesh,

    The maximum sampling rate of our evaluation tool is going to be limited by the communications interface over the UART. In practice, the fastest I've ever been able to get the Wavetool to run is ~1000Hz for single channel operation, 16b data. As you add channels and increase the data width it puts a larger burden on the communications interface and ultimately lowers the maximum sampling rate you can use. Faster sampling times would be achievable with an optimised evaluation system, and you could also use the ADPD107 instead of the ADDP105 to take advantage of the must faster SPI port. The ADPD105 has an I2C interface that will likely max out around 700kbps.



  • Hi Kevin,

    Thanks for replying. Can you share the register configuration/dump that you had used to get 1000Hz sampling frequency? The maximum value that I've been able to get is only 500Hz. I am also able to use only channels 3 & 4 despite enabling channels 1 & 2 (with the values given in the ADPD105 datasheet - Table 21, page 33). Register 0x3C reads 0x3006 and register 0x37 reads 0x0000 and according to the datasheet, these values must enable all 4 channels of the ADPD105. However, all I get is a constant zero line for Channels 1 & 2 (screenshot and register dump attached).

    What could I possibly be doing wrong?

  • Hi,

    The ADC offset registers will subtract the value in the register from the output of the ADC. For timeslot A, these registers are 0x18/19/1A/1B for channels 1 through 4, respectively. For timeslot B, the registers are 0x1E/1F/20/21. As you can see, for timeslots A and B you have the ADC offset registers set to 0x3FFF which will zero out those channels. The idea behind the ADC offset registers is to zero out any residual digital values in dark conditions. Or, if you're trying to limit the amount of communications over the comms port you can set the FIFO up to sum all four channels and just output a single value per timeslot. When doing this, you would set the ununsed channels to 0x3FFF so that they're not included in that sum.

    As for max sampling rate, again, it will depend on number of channels, number of pulses, and the speed of your communications port. For the fastest rates you would need to understand how fast the I2C is running on your micro, how fast you can get data from your micro to your computer, as well as the settings of the device.