I want using GPIO0 as interrupt X.
So I controlled registers as below. Is this the right control?
- ADDR 0x0006(FIFO_TH) => FIFO_TH[7:0] = FIFO bytes size – 1
- ADDR 0x0014(INT_ENABLE_XD) => INTX_EN_FIFO_TH = 0x1 (enable)
- ADDR 0x0023, GPIOOUT0[6:0] = 0x02 (Interrupt X)
- ADDR 0x0022, GPIO_PIN_CFG0[2:0] = 0x03 (output—inverted)
When ADDR 0x0022, GPIO_PIN_CFG0[2:0] = 0x03 (output—inverted)
- If interrupt X occurs, what is the polarity of the GPIO0?
- If interrupt X occurs, can interrupt X occur again?
=> If it can happen again, will GPIO0 be toggled?