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Issues with EVAL-ADPD4100Z-PPG Board Modifications for SPI Communication

Category: Hardware
Product Number: ADPD4100

Hi,

I hope you are doing well.

We're encountering issues with the EVAL-ADPD4100Z-PPG while trying to interface it with an external MCU (STM32) via SPI. Our MCU operates at 3.3V, so we made the following modifications to match the board's IOVDD to 3.3V:

  • Set JP2 to VDD_3V mode
  • Removed R1
  • Removed E1

Despite these changes, we couldn't establish communication with the IC. We initially suspected our manual breakout, so we reverted these modifications and used a logic level converter (1.8V to 3.3V), which functioned correctly. After reverting to the original modifications, we noticed that the CS line was still being pulled high to 1.8V despite the removal of R1 and setting the IOVDD pin to 3V3.

Could you help us understand why the CS line behaviour persists and suggest any further modifications to correct this?

Thank you.

  • I went through this as well- in addition to your changes above, I ended up pulling off U3, Shorting JP8 pins 1&2, and removed R2 though I don't think this had an affect.   In code I changed LOW_IOVDD_EN register bit to 3 volt mode also.   

    This is on page 2 of the schematic.... the page you need to rotate vs page 1.