Hello,
I noticed strong jittering when I output half the sampling frequency on one of the GPIO pins. I did a mean measurement with an oscilloscope (see picture). It shows an offset of up to 15 periods of the 32 kHz clock. All of the clock period offsets in this range are equally likely. What could be the cause of this?
Sampling frequency is 500 Hz. Only Slot A is enabled. GPIO0_ALT_CFG is set to 0x0F ("toggles on every sample, which provides a signal at half the sampling rate"). The 32 kHZ clock doesn't jitter when I output it on one of the GPIO pins.
Another problem: I tried setting one of the GPIO pins up according to the clock calibration section, but it is continuously high instead of sending pulses. The SLOTA interrupt doesn't need to be cleared, does it?
Can somebody help me see what I'm missing?
Best regards
PS: here is a video of the jitter