ADPD103
Not Recommended for New Designs
The ADPD103 is a highly efficient photometric front end with an integrated 14-bit analog-to-digital converter (ADC) and a 20-bit burst accumulator that...
Datasheet
ADPD103 on Analog.com
Dear Sir,
Does ADPD103 can drive a LED ( 5V~7V@20mA ) by the following Schematic? And the VCC is 8V.
Hello,
The maximum voltage that can be applied at the LEDX pin is 3.6V. If the voltage of the pin is pulled above that voltage it could result in damage to the device. There are two things to watch for, the first is what the forward bias voltage of the LED will be when the driver is at 20mA. The cathode of the LED will need to be <3.6V when the LED is on. The second thing is what will the drop across the LED be when the LED driver is OFF. There will be some leakage through the LED driver and the ESD diodes that will cause some voltage drop across the LED, but lower than the turn-on voltage of the LED. Typically, this will be on the order of nanoamps. With green LEDs operating on a 5V VLED, for example, the voltage drop of the LED is large enough due to this leakage current that the 3.6V maximum voltage of the driver pin is not violated. You would need to experiment with your particular LED to see if this is the case.
Regards,
Kevin
Hi, Kevin
Thank you for your patience. There is another question about the Vbias in the following figure. Could you tell me the voltage of the Vbias? And What is the relationship between PDC and Vbias?
8267.46a7d0c7e885a283404c565cc7e94a8c.png
Thanks and Regards,
Danvy
Hello Danvy,
Setting of the TIA Vbias and the PDC are described in detail in the datasheet, using registers 0x42 and 0x44 for TIA Vbias for timeslots A and B, respectively. PDC is set using registers 0x3C and 0x54. Please read the datasheet.
Regards,
Kevin
Hi, Kevin
I think that the registers 0x42 is about the TIA gain. Does it refer to the TIA Vbias?
5621.c58b144a3a15e2b7db299f1998cc6479.png
Thanks and Regards,
Danvy
For some reason I assumed that we were talking about the ADPD105 since it's the latest device in the family. If this is a new design, then you should be looking at the ADPD105 (or ADPD107 if you wanted SPI). The ADPD105 is backwards compatible. There is more detail included in the datasheet with respect to some of the registers. For example, register 0x42/44, you will see the detail on bits [5:4] for the TIA_VBIAS
0844.4857d40b946e0370b2b265b666528d1f.png
Sorry for the confusion.
Regards,
Kevin
Thanks Kevin, it is really helpful to me. I have read the datasheet of ADPD105, and get more details. Acturally, I still have the question about the PDC setting to 1.3V or 1.8V. For example, I set it to 1.3V, and the AD output is 16383 in the Digital Integration mode. While I set it to 1.8V, the AD output drop to 0. And I have no idea for that.
Thanks and Regards,
Danvy
Hi Danvy,
The PDC voltage only affects the voltage at the cathode of the photodiode, which should be connected to the PDC pin. The anode of the photodiode is connected to one of the PD inputs and the bias at that node is set by register 0x42 and 0x44 as mentioned in a previous response. Changing the cathode voltage of the PDC pin from 1.3V to 1.8V will only change the reverse bias across the photodiode. Assuming that you have everything connected correctlyI can't think of a reason that you would see the output of the device rail one way or the other based simply on the change in reverse bias of the PD. Please do the following:
1. Make sure that you have the PD corrected correctly
2. measure the voltages at the anode and cathode of the PD. You'll need to do this with an oscilloscope to see what the voltages are during the sampling period since they will both go to VDD during the sleep time.
3. Verify that you have the correct timing for digital integration mode based on the description in the datasheet.
Regards,
Kevin
Hi Kevin,
I am sure that the PD is connected correctly. And I will capture the voltage of the anode and cathode with an oscilloscope.
However, another question is about the input voltage of the ADC. I mean when I set ADPD103 to TIA mode, the TIA output is connected to the input of ADC. And what is the range of the TIA output voltage or ADC input voltage?
Thanks and Regards,
Danvy
Hi Danvy,
The ADC internally handles +/-1.2V.
Regards,
Kevin
Hi Kevin,
There is somethings puzzle me about the numbers of LED pulses. For example, assuming that I configure the ADPD103 into the Digital Integration mode, set the number of LED pulse to one pulse, and get 4000 form the ADC register. While, when I set to 10 LED pulses, the value of ADC is 45000, and 20 pluses is 90000, 30 pluses is 135000.
I cannot understand that. In my eyes, when the pulse is 10, the value may be about 10*4000= 40000, and pluse is 20, it will be about 20*4000 = 80000.
In Digital Integration mode, the registers of LED and AFE is setting as following.
0x30 0A19,
0x39 2184,