Hi Gabriel, this is strange. Could you please re-post this on the ADI support portal? That is the better way for support. As the IC TMC966x family is quite new, there is not yet much experience in the community. And the developers mostly are too busy to visit EngineerZone... 

Hi Bernhard, thank you for the fast response. Since I am not getting any response on the support portal, I was duplicating my case on EngineerZone to hopefully get any additional information...
With such a problem our development is stuck, since we are not able to correctly drive the 4th phase of our stepper motor (even not on the STP-EVKIT board).
Maybe it would be possible to reproduce these errors and forward them to the development team of the TMC9660...
I'd really appreciate any help you can offer.

Hi Gabriel, understand. I've forwarded internally. It is very probably an issue in achieving the correct settings. I will keep you updated.

Hi Gabriel, I have an update: My colleagues have been able to replicate the issue. Unfortunately it is a bug within the IC, skipping the strong discharge phase for bridge Y2_HS output. I sketched a solution in the attached whitepaper that should resolve the issue. A fixed TMC9660 version will become available in 2027coming together with a bunch of additional enhancements that are currently in work. 

I'm very sorry for the issue. 

TMC9660 Gate-Driver Output Bridge Y2 Issue and Recommended Fix

Purpose. This whitepaper summarizes a practical approach for identifying and fixing an issue observed on bridge Y2 of the TMC9660 gate-driver output stage. It is intended for the first silicon revision when driving a 2-phase motor, or when using bridge Y2 as an additional half-bridge. It does not apply for use-cases with individual control of one or two MOSFETs using bridge Y2 HS and LS outputs.

1. Background

The TMC9660 is a new, complex device mainly intended for the control of 3-Phase BLDC motors. It adds a fourth half-bridge control for 2-phase, four wire motors, as well as for different purpose that allows driving additional high-side and low-side MOSFETs.

2. Issue Description

The reported issue concerns bridge Y2 of the TMC9660 gate-driver output. The observed problem is that the strong pull-down function on the Y2 high-side MOSFET gate does not engage and keep the high-side gate sufficiently discharged when the low-side MOSFET becomes active. As a result, the high-side MOSFET gate can remain partially charged or become unintentionally biased while the low-side MOSFET is being switched on, creating a risk of unwanted high-side conduction, shoot-through current, or abnormal bridge behaviour. This can be observed by increased power draw when activating PWM on bridge Y2. The severity of the issue depends on supply voltage, and ratio of Gate-Drain capacitance of the external MOSFET to its Gate-Sourve capacitance.

The key distinction during debug is whether the high-side gate is being discharged quickly and robustly enough when the complementary low-side device turns on. For this issue, the proposed mitigation is not only a parameter change; it is a small external hardware addition that reinforces the high-side gate discharge path using the existing low-side gate-driver signal as the control reference.

3. Root Cause

• Insufficient high-side gate discharge on Y2: The TMC9660 high-side MOSFET gate strong dischage is not becoming engaged while the low-side MOFET switches on.

4. Diagnostic Procedure

1. Reproduce the Y2 condition: Operate the TMC9660 application with no motor attached but MOSFET bridges switching with chopper. Monitor current draw at the power supply with bridge Y2 disabled vs. operation with bridge Y2 enabled. A substantial increase of power supply current shows that cross conduction occurs. Carefully test with reduced supply voltage before increasing voltage to the desired operation point. Do not further increase supply voltage if current draw increases more than a few 10mA.
2. Probe the Y2 high-side gate-to-source voltage: Measure directly between the high-side gate and source pins with a low-inductance probing method.
3. Compare low-side turn-on with high-side discharge: Verify whether the high-side gate remains above the safe off-level when the Y2 low-side MOSFET is switched on.

Additional steps when fix is applied

4. Validate the auxiliary MOSFET patch: Confirm that the added MOSFET turns on with the low-side gate signal and clamps the high-side gate below its gate-threshold voltage during low-side conduction.
5. Check driver loading and timing margin: Ensure that the auxiliary MOSFET gate does not overload the low-side gate driver or create timing overlap with normal high-side switching.

5. Recommended Fix

The recommended fix is to add an additional MOSFET close to the Y2 high-side MOSFET gate network. This auxiliary MOSFET is controlled by the TMC9660 low-side gate-driver output. When the low-side MOSFET is commanded on, the auxiliary MOSFET also turns on and provides an active discharge path from the high-side MOSFET gate to GND. In effect, the low-side gate signal enforces a hardware interlock: whenever the low-side device is being driven on, the high-side gate is actively clamped low.

The auxiliary MOSFET should be a small switching device capable of conducting a few Ampere and able to resist the full bridge voltage plus high-side gate driver voltage. Ensure adequate gate-threshold margin, identical to or slightly lower than that of the power MOSFET bridge devices, and sufficient pulsed current capability to discharge the high-side gate charge quickly. The same voltage rating as the power bridge MOSFETs plus roughly 10V will fit. A 100V device fits the full application range, in case 80V power MOSFETs are used. Its drain-source path should be connected so that it shorts or strongly pulls down the high-side MOSFET gate to GND. A series source resistor R may be added to limit peak current during the switching events to the MOSFETs rating. In most constellations this resistor should not be required. As the low-side MOSFET engages at the same time as the auiliary MOSFET, conduction occurs at the low-side MOSFETs Miller Plateau. In case the low-side MOSFET has a substantially higher VGTH than the auxiliary MOSFET, a resistor of 1Ohm or less could be applied. A 1A 30V Schottky diode over the high-side MOSFET source to gate prevents the gate from charging to a negative voltage.

This fix should be implemented as a local hardware patch or board revision close to the Y2 power MOSFETs. The routing from the auxiliary MOSFET to the high-side gate should be short and low inductance, because the purpose of the circuit is to remove gate charge during the fast transient interval when the low-side MOSFET turns on.

Figure 1. Schematic concept for the Y2 fix: a small auxiliary MOSFET is driven from the TMC9660 low-side gate-driver signal and actively clamps the Y2 high-side MOSFET gate to GND while the low-side MOSFET is switched on.

6. Validation Checklist

7. Conclusion

The Y2 issue is best understood as a high-side gate-discharge robustness problem. The proposed fix adds a small auxiliary MOSFET controlled by the TMC9660 low-side gate-driver output. During low-side turn-on, this auxiliary device actively discharges and clamps the Y2 high-side MOSFET gate to GND, preventing residual or Miller-induced gate charge from turning the high-side MOSFET on unintentionally. This hardware reinforcement directly addresses the missing strong-pull-down behaviour and should be validated with gate-to-source probing and load switching tests.

Hi Bernhard,
thank you for the very fast response including a proposed solution (also if only temporal).
We were able to implement the fix on our Motor Control Modules and could verify that Y2 is now operating "correctly".
Since the used auxiliary mosfet (with adequate voltage ratings that we had laying around), had a relatively low threshold voltage, a resistor of 1Ohm was defenitively neccessary to not get into the same issue again.



Since you have mentioned that a bunch of additional enhancements are to be expected, could you please name those. (Maybe also a fix of the SPI communication in parameter mode?)
With this hardware problem resolved, we could basicly begin with pre-production testing (with the next PCB version) and it would be a problem if we would have to make hardware design changes in 2027.

Best Regards
Gabriel

Hi Gabriel, great! Thank you for your the feedback! The fixes will be announced with the new device and will be made in a way that allows full compatibility. I do not expect that we change anything that requires re-wiring.