How is sigma-delta current feedback connected on the FlexMC LV platform?
How is sigma-delta current feedback connected on the FlexMC LV platform?
Current feedback to a processor/FPGA is available as an output of sigma-delta modulators connected across a shunt resistor in series with the motor phase as shown below. MCLK is the high frequency clock (5-20MHz) from the processor/FPGA and MDAT is the high frequency single-bit data stream from the modulator to the processor/FPGA. This data must be filtered and decimated within the processor/FPGA connected to the platform.
