AD2S1205 - Q&A - Motor Control Hardware Platforms

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Q&A AD2S1205

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hpkamen on Mar 22, 2017

Dear Sir/Madam,

I use FPGA drive ad2s1205 for testing fault detection delay time . When EXC , SIN, COS ar NC, the fault detection delay maximum value is not 125us , but 800us ; if the EXC SIN connect resolver signal , COS NC , the fault detection delay maximum value is about 24ms .

I wonder what the main reason for this phenomenon, and how to judge whether the the Rotary transformer has broken ?

0 jcolao

on Mar 23, 2017 1:14 AM
Hi hpkamen,

May I know what CLKIN frequency. The tracking rate, the tracking loop bandwidth and excitation frequency would vary with the clock frequency. The 125us in the datasheet was under the condition of CLKIN = 8.192MHZ.

Regards,

Jonathan
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0 ezadmin

on Aug 2, 2018 3:46 PM
This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

Thank you,
EZ Admin
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