High Precision PWM (HPPWM)

Below is a code snippet showing how to use High Precision PWM (HPPWM) for 3 phase PWM.

HPPWM relies on an internal PLL that multiplies the system clock (SCLK) by a factor of 4. Before enabling HPPWM, make sure SCLK is within the range of 60MHz to 100MHz or the internal PLL will not work.

void Enable_HP_PWM_AC(void){

   uint32_t temp_changeMMR;     

   temp_changeMMR = *pREG_PADS0_PCFG0 + 0x4;  // Enable HPPWM in Peripheral Conf. Register

   pREG_PADS0_PCFG0 = temp_changeMMR;


   temp_changeMMR = *pREG_PWM0_CHANCFG + 0x101010; // Enable HP on phase A+B+C

   *pREG_PWM0_CHANCFG = temp_changeMMR;  

   if (*pREG_PWM0_STAT & 0x80000000){              // Check if HPPWM Ready

      {printf("AC High Precision On\n");



To set high-precision duty-cycle, use PWM_xH_DUTY0 which holds both the "regular" duty-cycle (PWM_AH0) as well as the HP duty-cycle (PWM_AH0_HP). PWM_AH0 is at [31:16], PWM_AH0_HP is at [15:14].

bits [15:8] of PWM_xH_DUTY0  form the decimal part of a non-integer, fixed-point duty cycle value in Q15.8 format. The lowest bits are ignored. In this example, "regular" duty-cycle is set to 0xAAAA and HP duty-cycle to 0x2=10b

   *pREG_PWM0_AH_DUTY0 = 0xAAAA8000; // 1010 1010 1010 1010 1000 0000 0000 0000

   *pREG_PWM0_BH_DUTY0 = 0xAAAA8000;

   *pREG_PWM0_CH_DUTY0 = 0xAAAA8000;