ADuCM350 FAQ GP Timers

Q: ADuCM350 FAQ GP Timers

Q. What is the reference clock for the GP Timers? A: The clock source for GP Timers can be HF_CLK,PCLK,LF_CLK or LF_XTAL which is programmable. T he GP timer modules can get starved of clock if the clock source mux is set to a clock that is not (or no longer) present. In that state, the mux cannot be changed back (timer domain never synchronizes). To avoid this, always check clock status before setting timer mux to anything other than PCLK and then set mux back to PCLK before disabling the timer after its use. Q. What are the operating modes available with the timers? A: The timers can operate in Free running or periodic mode. In free running mode, the counter increments/decrements from the minimum/maximum value until full/zero scale and starts again. In periodic mode, it starts from the value in the GPTLD MMR until zero/full scale. The timers also provide PWM function and can also capture 16 interrupt event functions.

Q. What is the reference clock for the GP Timers?

The clock source for GP Timers can be HF_CLK,PCLK,LF_CLK or LF_XTAL which is programmable.
The GP timer modules can get starved of clock if the clock source mux is set to a clock that is not (or no longer) present. In that state, the mux cannot be changed back (timer domain never synchronizes). To avoid this, always check clock status before setting timer mux to anything other than PCLK and then set mux back to PCLK before disabling the timer after its use.

Q. What are the operating modes available with the timers?

A: The timers can operate in Free running or periodic mode. In free running mode, the counter increments/decrements from the minimum/maximum value until full/zero scale and starts again. In periodic mode, it starts from the value in the GPTLD MMR until zero/full scale.

The timers also provide PWM function and can also capture 16 interrupt event functions.