Q&A - Recent Threads

Faulty PCBs with ADAU1787

joaocolombari — Mon, 15 Jun 2026 20:48:38 GMT

Hi guys,

I have been working with a custom PCB based around the ADAU1787 and Nordic nRF5340 processor and nPM1100 PMIC.

We have a couple of PCBs and two of them suddenly dropped the 1V8 output to (about) 0V6. I was not flashing or even touching the PCB, just running a test application on idle. I have about 3R between VDD and GND in these two boards.

After that, I removed the PMIC and tested again, and the short remains there, so I am now starting to check the other ICs in VDD, like the ADAU.

Could you point if is there any problem in the schematic/setup? What is the ADAU1787 supposed to do when an overcurrent event happens?

For reference, DVDD and AVDD are supplied by two separate converters that are fed by other node.

Thanks a lot!!

Cheers,

João Colombari

How to configure external clock for SPORT interface as described to get 62.5Mhz for receive

joelleoj — Mon, 15 Jun 2026 09:26:28 GMT

I plan to use adsp-2156x series of microcontrollers and i want to know what is meant my using SPORT with external clock and does using PCG count as an external clock in this case. As per the datasheet spec SPORT can receive data with external clock up to 62.5 MHz

Require detailed information on this product series

Prashanth Bharadwaj — Mon, 15 Jun 2026 06:43:42 GMT

We are planning to short list processor (ADSP-SC835) for one of the R&D project.

For this, we need the following details:

a) Part / series roadmap and part launch date

b) Estimated usage in different industry

c) Longevity or life cycle of this part

d) Parallel bus support peripheral availability in this chip to communicate with external device (eg: 16Bit data and 20bit address lines)

e) Future development roadmap for this series.

Require detailed information on product series

Prashanth Bharadwaj — Mon, 15 Jun 2026 06:41:11 GMT

We are planning to short list processor (ADSP-21569) for one of the R&D project.

For this, we need the following details:

a) Part / series roadmap and part launch date

b) Estimated usage in different industry

c) Longevity or life cycle of this part

d) Parallel bus support peripheral availability in this chip to communicate with external device (eg: 16Bit data and 20bit address lines)

e) Future development roadmap for this series.

Potentiometer changing Freqency in Variable Filter

dubdane — Tue, 09 Jun 2026 15:22:53 GMT

Hi Analog People,

I want to build a simple 2x3 DSP with ADAU1701 (Wondom APM2 + APM3). I want to be able to change the crossover frequency with an external 10kOhm lin potentiometer on the Var Q/F Filter. Further I want to use an i²c output to run a little peakmeter (PCM5102 Module) and i want to switch the audio on the i²c output with a GPI.

This i what I have so far:

What do you say?

Best

Dane

EVAL-ADTF3175D-NXZ: cannot re-flash ADSD3500 firmware after a 4.1.5 downgrade — "burst transfer failed" on every write tool (chicken-and-egg)

TangKim — Mon, 08 Jun 2026 04:55:40 GMT

Summary

On an EVAL-ADTF3175D-NXZ kit, the ADSD3500 firmware was downgraded to 4.1.5. After moving the SOM to the v6.1.0 SD image (SDK 6.1.0, commit 847bd8bd), I can no longer flash the firmware up to 5.2.5
(Fw_Update_6.0.0.bin). Every firmware-write path fails, and the kernel driver reports "Read/Write burst transfer failed". Read-only access still works, so the board is alive and I have a full NVM backup. I need the
correct recovery procedure (or a full flash image) to get the module back to a working firmware.

Hardware / Software environment

- Kit: EVAL-ADTF3175D-NXZ (NXP i.MX8MPlus SOM + ADTF3175D module: ADSD3100 + ADSD3500)
- SD image: microsd-v6.1.0 (Ubuntu 20.04.6, kernel 5.10.72-adi)
- SDK: ToF 6.1.0, commit 847bd8bd
- ADSD3500 firmware (current): 4.1.5 (downgraded; chip ID reads 0x5931)
- Target firmware: 5.2.5 (Fw_Update_6.0.0.bin, 97792 bytes)
- ADSD3500 I2C: bus 1, addr 0x38

Background (how it reached 4.1.5)

The module originally shipped with firmware 4.2.0.0, which initialized and communicated normally. During earlier debugging it was downgraded to 4.1.5 by flashing Fw_Update_4.1.5.bin. We do NOT have a full flash
backup of the original 4.2.0.0 image (the on-board /boot/ADTF3175D.nvm turned out to be identical to the current 4.1.5 contents — verified with cmp).

Symptom — the key diagnostic

The kernel driver fails all burst transfers to the ADSD3500:
adsd3500 1-0038: Read burst transfer failed
adsd3500 1-0038: Write burst transfer failed

fw_upgrade (built from tools/nvm_tools/fw_upgrade) gets through reset, burst-mode switch, and the update command, but fails at the very first packet write (v4l2_ctrl_set(fd, 0x009819e1, ...)):
Size of Binary: 97792
Resetting the ADSD3500: ~7s.
Reset done.
send_switch_to_burst_mode_command; SUCCESS
send_get_firmware_version_command: Failed to set ctrl with id 9968097
FAIL
send_init_update_commands: Update firmware command; SUCCESS
Packets Needed: 382
Packet number: 1 / 382 Failed to set ctrl with id 9968097

What I have tried (all fail with the same root cause)

- data_collect --ip --fw Fw_Update_6.0.0.bin (host, network via aditof-server 0.0.0.0:5556): Connects fine, but camera init fails — "camera_itof.cpp:161] Unkown imager type: 0" then "main.cpp:328] Could not
initialize camera!". 4.1.5 does not support the 0x0032 imager-type query, so init never reaches the FW-write stage. No init-bypass option in --help.
- Firmware_Update Fw_Update_6.0.0.bin (on-target): "Switched to burst mode" then "Reading Adsd3500: Input/output error" then "Current firmware version is : 0.0.0.0" then "Writing... Packet 1/382: Input/output error".
- fw_upgrade (on-target, with reset_adsd3500()): reset + burst + update command all SUCCEED; the first packet write fails ("Failed to set ctrl 0x009819e1").
- NVM_WRITE (on-target): Same write path (v4l2_ctrl_set 0x009819e1) gives the same failure.
- host_boot.sh (BootROM, host_boot.py over raw I2C): RAM boot-FW load succeeds ("CHIP_ID is correct ... 0x5931"), but the subsequent "modprobe adsd3500" cannot talk to the chip — "Read of Chip ID register failed",
"Chip ID: FFFF8000 is wrong", "Could not set mode register". So subdev-based tools cannot run in host-boot mode.
- Web-UI flash_firmware.sh (gunicorn :8000): It is just a wrapper around Firmware_Update, so the same failure.
- Stop network-gadget / reload driver / clean reboot: No effect — the root cause is the burst incompatibility, not resource contention.

What still works

NVM_READ (standard-mode read, not burst) completes successfully — it reads all 362 packets and produces a valid 741376-byte full-flash image. So I2C / chip ID / standard-mode read are all healthy, and I have a full
backup of the current (4.1.5) flash plus /boot/ADTF3175D.ccb. It appears that 4.1.5 responds to standard-mode reads but not to burst-mode transfers, which the v6.1.0 driver/tools require for any firmware write.

Questions

1. Is there a full flash image (.nvm / .bin) for a known-good firmware (4.2.0.0 or 5.2.5) that I can write back via NVM_WRITE, including the correct ADSD3100 calibration layout?
2. What is the official recovery procedure when burst transfers fail like this? In particular, is there a way to write the NVM in host_boot (BootROM) mode over raw I2C, independent of the kernel driver and burst
mode?
3. The firmware upgrade wiki says "If the version number has not updated please check the NXP based option to update the firmware." — where is that "NXP based option" documented?
4. Is the "Read/Write burst transfer failed" here a known 4.1.5 ↔ 6.1.0 incompatibility, and if so, what is the recommended path out of it?

All logs are inline above — no attachment needed. I have a full NVM dump of the current 4.1.5 flash (741376-byte NVM_READ image) and can share it by whatever channel ADI prefers.

Boot Mode to be used to program the external flash

tavinoth — Thu, 04 Jun 2026 07:05:51 GMT

I am using the EV-21569-SOM and an ICE-2000 emulator for programming.

My goal is to program the external flash using the emulator and then boot the DSP from the external flash.

Do we need to keep the DSP in No Boot/Custom Boot mode (BMODE[2:0] = 000) while programming the external flash using the ICE-2000 emulator, and then change BMODE to 001 for booting from the external flash?

Could you please confirm if this is the recommended procedure?

PTP CLOCK

chb613 — Wed, 03 Jun 2026 09:43:27 GMT

Hi,

I am using SC589-MINI baord.I encountered a problem when using the PTP module: it works properly with the internal clock, but not with the external clock.

the driver is:sam-audio-starter-3.1.0-Github

The program is stuck on this line，if using ADI_ETHER_GEMAC_PTP_CLK_SRC_EXT.

Regards,

Bingo

RE: End of life ADUCM355

Jenniferdelightae — Tue, 02 Jun 2026 04:56:44 GMT

The current situation is quite challenging. The IAR Workbench evaluation license is limited to just 15 days and seems to be dependent on the system's IP address. Considering that the evaluation board itself is already expensive, purchasing a full IAR license solely for basic prototyping and evaluation purposes may not be practical. Could you please suggest an alternative approach or licensing option?mark.ramos

EV-21569-SOM SigmaStudio+ ACTIVE but no sound output

SimonTH — Fri, 29 May 2026 09:59:06 GMT

Hi everyone,

I am currently testing a basic SigmaStudio+ project using:

EV-21569-SOM
EV-SOMCRR-EZKIT

I created a very simple project with a Sine Tone generator routed to output Channel 0.

The following steps were completed:

Connected the SOM board with the EV-SOMCRR-EZKIT
Connected USBi to the board
Opened the project in SigmaStudio+
Executed “Link → Compile → Download”
Download completed successfully
The status at the bottom-right of SigmaStudio+ shows “ACTIVE”

However, I still cannot hear any audio output from the headphone jack on the board.

Here are the things I would like to ask:

Why is there no audio output even though the project status is ACTIVE?
Is there any additional hardware configuration required (switches/jumpers/boot mode)?
Which audio output should be used for Channel 0?
What is the correct step-by-step procedure to test a basic sine wave output on this setup?

These are the basic checks I already tried:

Replugged headphones
Re-downloaded the project
Confirmed SigmaStudio+ shows ACTIVE

Any advice or example project would be greatly appreciated.

Thank you!

USB HDRC driver for BF70x

Raam — Thu, 21 May 2026 10:58:01 GMT

CCES installation contains USB driver for musb hdrc. Is this driver compatible with USB controller on BF706? If yes, is there any example for using this driver ?

Compatibility between ADUCM320 and ADUCM320i

baggio — Wed, 20 May 2026 16:04:31 GMT

Hello. I have question. Please tell me.

Are the ADUCM320 and ADUCM320i fully compatible in terms of software and PIN code, with no functional or physical changes whatsoever?

Because, if the internal Flash of the ADUCM320 or ADUCM320I is pre-programmed before mounting it on the board, and no reprogramming is performed afterward, I believe it should be possible to swap them out. What do you think?

Best Regards.

How to dump or flash through OpenOCD (micro USB interface)? Board: Max32655FTHR

OttoWei — Fri, 15 May 2026 14:47:34 GMT

How to dump or flash through OpenOCD (micro USB interface)? Board: Max32655FTHR

IDE: CodeFusion Studio™ (Rev. 2.1.0) with VSC

SPI sub select in firmware

Blazico0 — Fri, 15 May 2026 09:55:32 GMT

I am using the ASDP-BF706 to read samples from an LTC2325-16 ADC using the SPI0 bus in quad subordinate mode. This is the only device on this bus, so it is a direct connection. On our current board design we are using GPIO pin PA_05 to generate the SCK signal. This pin is also multiplexed to SPI0_SS (subordinate select). Is it possible to use SPI in subordinate mode without having to use the hardware pin by modifying the firmware and if so how?

Asking about flash program to eeprom with adau1452 Development Board

CLB865 — Fri, 15 May 2026 08:31:54 GMT

Hi All
I am using ADAU1452-DSP Board ADAU1452 DSP BOARD for developing my software features:
Currently, I have configured the program to flash to the EEPROM with the information as shown in the attached image, but I don't see the data being successfully written. Is my connection and flashing method correct? Please check it for me. Thanks !

ADAU1452 BCLK_IN0 Signal Issue with RK3588

PhongLT2 — Wed, 13 May 2026 13:30:50 GMT

Dear Support Team,

I am currently working on connecting the RK3588 Rockchip processor to the ADAU1452.

The signals on pin 58 (LRCLK_IN0) and pin 59 (SDATA_IN0) are normal. However, the signal on pin 57 (BCLK_IN0) of the ADAU1452 appears to be very poor.

I checked the BCLK_IN0 pin independently and found that there is already a waveform present even when the pin is not connected to the RK3588.

The ADAU1452 is configured as a slave device. I also tested the ADAU1452 independently without any connection to the RK3588. After loading the program, I measured the signal on pin 57 (BCLK_IN0), and the waveform appears as shown in the attached image. I think the BCLK_IN0 signal should initially remain flat at 0V.

Could you please advise whether this issue is more likely related to hardware or software/configuration?

Thank you for your support.

Best regards,
Phong

How can I find the pre-programmed code of MAX32655FTHR board?

DyUMD — Fri, 08 May 2026 15:02:16 GMT

As title, because I already flashed the program memory, now there is another one program in the board, could I restore the preinstall code?

Role of the p-type JFET(MMBFJ177) in EC sensor channels

wogml111 — Tue, 05 May 2026 11:33:44 GMT

Regarding the EC sensor section in this evaluation board, I would like to understand the specific role of the P-type JFET (MMBFJ177) to determine if it's necessary for my system.

I would greatly appreciate it if you could elaborate on its function. Thank you for your time and help.

ADAU 1787 TDM SLAVE SAI0

Val52100 — Thu, 30 Apr 2026 12:20:07 GMT

Hello,
It's been few years now that we're using the ADAU 1787 in our designs.

Today we need to use the TDM port 0 (SAI0) of the ADAU 1787 in Slave configuration.

When we bought our first eval board I remember having trouble using the SAI0 port for TDM.
Back in the days, we only needed one SAI port so we tried to use the SAI1 instead and we didn't know why but the SAI1 port was working but not the SAI0 with exact same configuration.
Today we have an application that require both SAI port so we don't have choice that to dig in the problem.

So we started a new sigma studio project from scratch to use the SAI0 port as slave.
But we rapidely came into the same conclusion that we have no TDM audio in or out using the SAI0 port as slave.

The first thing we tried is to replicate our setup with the SAI1 port and everything worked.

We check the TDM signals (bit clock, LR clock and DOUT) of our master on SAI0 with an oscilloscope and the signals are perfects.

The weird thing is when I change the settings (for example the polarity) I would expect some "white noise ish" if I have the wrong setup. But I get no sound at all like the SAI0 port was not activated, but I checked and everything is well powered in sigma studio.

I'm kind of running out of things to try knowing my SAI1 port is working without problem.

I also tried to create a sine on the DSP and sending it to my DAC with the SAI0 port on slave and that is working too so my ADAU is working but the port SAI0 is not.
I tried with multiple ADAU 1787 and the problem is the same.

What could cause the issue of no sound IN/OUT of the SAI port knowing that it's well powered in the proper window ?
Can you list me all the parameters to look at to make the SAI0 port in slave config works please ?

Have a nice day
Valentin

Crystal load calculation for ADuCM350

enpa — Wed, 29 Apr 2026 14:14:25 GMT

We need to replace the 16 MHz crystal in an application based on ADuCM350.

The datasheet (Rev B, page 10) states that CEXT1 = CEXT2 should be between 10 and 15 pF.

The evaluation board (UG-668, Rev A, page 10) uses 2x 24 pF.

The HRM (UG-587, Rev E, page 456, table 640) states that no capacitors are required as these are integrated in the crystal (?)

The datasheet does not state the input capacitance of the HF_XTAL pins.

Please advise on how to proceed to define the load capacitors.

Thank you, enpa

ADUCM355QSPZ - AFEDIE-GPIO0 is always high

stavrosEmbedded — Tue, 28 Apr 2026 21:29:15 GMT

I am using ADuCM355BCCZ evaluation board.

I need to use AGPIO2.0 (GPIO0, pin G10) as a GPIO output to control an ADG1608 multiplexer.

The pin is always HIGH and I cannot pull it LOW using:

- AfeDioCfgPin(pADI_AGPIO2, PIN0, 0)

- AfeDioOenPin(pADI_AGPIO2, PIN0, 1)

- AfeDioClrPin(pADI_AGPIO2, PIN0)

Register reads confirm: OEN=0x01, OUT=0x01 after AfeDioSetPin but physically G10 stays HIGH. AGPIO2.1 (GPIO1, H10) works correctly with identical code.

The datasheet mentions GPIO0 has POR output and analog die power mode status function. How do we release GPIO0 from POR/status function and use it as a controllable GPIO output?

sigma studio+ didn't have SPDIF input for adau1466 at version 2.3.0

Nicole YU — Tue, 28 Apr 2026 01:53:00 GMT

I'm can not find spdif input port at sigma studio, how can I do, it is not as same as data sheet and your toolbox wiki.

VisualDSP++ 5.1.2 - is there any way to use command line to flash ldr like in CCES?

AssafCon — Mon, 27 Apr 2026 19:42:55 GMT

currently working on ADSP-21489 with licenced VisualDSP++ - a legacy setup for control system.
i'm trying to create some more simpler flashing method at production.
we use an external SPI M25P80 NOR Flash.
i want to use something like CLDP for VisualDSP++ - is there such a tool? or can i add it to my utilities on VDSP++?

adau1467

Srilakshmi — Mon, 27 Apr 2026 13:32:26 GMT

Can you please share the Reference board file and layout guidelines for the ADAU1467 DSP?

Also do we need to control WRITE_BACK(WRITE_BACK_MP6) signals from hardware?

how stack pointer is initialized and set in both ARM & SHARC cores ?

Sairam1211 — Fri, 24 Apr 2026 09:33:14 GMT

In ADI how is the stack pointer (SP) initialized? How is it set? Where exactly?

ARM Core : SP - how its initialized and set ?
SHARC Core : I7 - how its initialized and set?

I7 stack pointer initialized by ADC `___lib_setup_c` is ADI's C runtime initializer(ADI libc) ?

If the interrupt occurs before the stack pointer is set, an unexpected behavior may be caused. explain ?