MAX32666
Recommended for New Designs
DARWIN is a new breed of low-power microcontrollers built to thrive in the rapidly evolving Internet of Things (IoT). They are smart, with the biggest...
Datasheet
MAX32666 on Analog.com
MAX32625
Production
DARWIN is a new breed of low-power microcontrollers built to thrive in the rapidly evolving Internet of Things (IoT). They are smart, with the biggest...
Datasheet
MAX32625 on Analog.com
We have made customized Max32666 board for adding application. By mistake VCOREA and VCOREB both are connected and supplied voltage using Vrego_C. Instead of connecting Vrego_C to VCOREA and Vrego_B to VCOREB. We want to use only Core1 (COREA), so, no supply is given to VDDB. But VDDA and VDDIO both are connected properly to Vrego_A.
Also VRxIn and VTxIn is connected with Vrego_D. Also VREGI is connected with 3.3V external regulated supply.
Using JTAG debugger recommended by ADI and using External 3.3V regulated supply of PICO board, Gnd, nRST, SWDIO, SWDClk only . i.e ADI Max32625 PICO debugger HW using OpenOCD debug used to debug using GPIO example code given by ADI in the evaluation SDK example for Max32665/6
The nRST = 1 and resetting proper and Cortex-M4 r0p1 processor detected. Whereas when it tries to read processor internal registers it fails. Memory access fails in debugging time. Also some time before this stage reaching only it starts failing, at DP and some time much before MEM-AP error. I have tried varying debugger configuring 2000kHz, 1000kHz and 4000kHz. same issue observed. Flash memory unlocking tried with 0 0x800000 in configuration command debugger setting
Please suggest. is the Max32666GXMBT+ processor comes with Boot loader builtin? Any memory access security locking due to that access error? Is CoreA is independent of CoreB supply?
