2 or 3-Wire SPI on ADuCM36x uControllers?

Hello,

Can you please confirm if I am understanding your system requirements correctly?

The ADuCM36x would be acting as an SPI controller. Is the FPGA the SPI peripheral? Is the implementation of the SPI peripheral standard SPI or is it a custom implementation? Generally speaking, SPI is a 4-wire standard and CS is used for synchronization purposes between the controller and the peripheral, even though I am familiar with 3-wire implementation where SDO and SDI are combined into a unique Data line with half-duplex operation. Is it possible to get more information about the SPI Peripheral?

Regards,

Raquel. 

Hi Raquel,

Yes, your interpretation is correct - the ADuCM36x transmits data as the controller to the FPGA that acts as a SPI peripheral. The systems engineers that developed this requirement wanted the interface to be as simple as possible with a synchronous interface allowing systems with different clocks to reconcile the bit timing. Synchronization is handled using a timeout and/or sync pattern scheme instead of a discrete chip select.  

This would be considered a custom SPI where clock and controller data out are the only required signals. I'm not actually familiar with the half-duplex implementation you're referencing, but it sounds interesting. 

Hi,

If the ADuCM36x does not need to read any data from the FPGA, and the FPGA does not require the CS for synchronization purposes, you can leave the CS from the ADuCM36x disconnected.

Please note the following: "For any setting of SPIxCON[1] and SPIxCON[6], the SPI simultaneously receives and transmits data. Therefore, during data transmission, the SPI is also receiving data and filling up the Rx FIFO. If the data is not read from the Rx FIFO, the overflow interrupt occurs when the FIFO starts to overflow. If the user does not want to read the Rx data or receive overflow interrupts, SPIxCON[12] can be set and the receive data is not saved to the Rx FIFO." I understand you will need to configure the ADuCM36x as this paragraph says to avoid Rx Interrupts. With this configuration I believe you can leave the MOSI line disconnected as the Rx data is not saved into the ADuCM36x.

Regards.

Thanks for pointing out this detail with the Rx FIFO. I think this provides enough information for me to feel comfortable with using these parts for my system.