Hi all,
I am using a ADuCM360 with:
UrtCfg( pADI_UART,
B115200,
COMLCR_WLS_8BITS,
0);
ClkSel(
CLK_CD6, // iSpiCd by 64
CLK_CD7, // iI2cCd
CLK_CD0, // iUrtCd by 1
CLK_CD7 // iPwmCd by 128
);
ClkCfg(CLK_CD0,CLK_HF,CLKSYSDIV_DIV2EN_DIS,CLK_UCLKCG); // Select CD0 for CPU clock ------- CLOCK intern
I use HFOCS 16Mhz
When I send some byte I can see the width of Stop bit is different from the others.
If I enable the clock divider. CLKSYSDIV = 1 then all bits have same width.
Does it happen to someone the same?
I use the samples codes
Thanks
