Hi Team,
It seems that the SPI on the ADuC7xxx is designed for 8-bit transfers only. But there are 4-byte receive and transmit FIFOs.
So if 20bytes data is needed to transmit, will these data be needed to send 4 times?
ADUC7061
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The ADuC7060/ADuC7061 are fully integrated, 8 kSPS, 24-bit data acquisition systems incorporating high performance multi-channel sigma-delta (S-?) analog...
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ADUC7061 on Analog.com
Hi Team,
It seems that the SPI on the ADuC7xxx is designed for 8-bit transfers only. But there are 4-byte receive and transmit FIFOs.
So if 20bytes data is needed to transmit, will these data be needed to send 4 times?
Hi,
The receive and transmit FIFO is a buffer that holds the incoming and outgoing data.
Data to be sent is first loaded into the transmit FIFO before being sent out.
If there are 20bytes of data needed to be transmitted, the data would be loaded to the buffer and then sent out 1 byte at a time.
Regards,
Karl
Hi,
I will be closing this thread. Feel free to post another thread if you need more support
regards,
Mark