ADuC7061. ADC Offset Calibration Register (ADC0OF, ADC1OF)

Hi,

I saw that you attached an image, but it's not loading on my end.

Have you checked the offset calibration register before initiating the calibration? Is the reading 0 as well?

The ADC offset calibration register is automatically applied to the ADC reading to compensate for the offset error.

Regards,

Karl

Before initiating the calibration value of registers ADC0OF, ADC1OF is about 2..8.

What is the configuration for the ADCFLT register? Is chopping enabled?

Yes, of course:

ADCFLT_CHOP_ENABLE | ADCFLT_RUNNING_AVERAGE | ADCFLT_NOTCH2
+
 SF=9, AF=63 (Data_Rate=12.12Hz, Settling_Time=165ms, 50Hz --> -329dB)

Yes, of course:

ADCFLT_CHOP_ENABLE | ADCFLT_RUNNING_AVERAGE | ADCFLT_NOTCH2
+
 SF=9, AF=63 (Data_Rate=12.12Hz, Settling_Time=165ms, 50Hz --> -329dB)

Chopping already corrects the offset error. That is why the offset calibration register (ADC0OF, ADC1OF) reads as 0 after initiating the calibration since the chopping is enabled.