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ADuC845 Calibration Logic

From the ADuC845 datasheet,

                      The result of the zero-scale calibration conversion is stored in the offset calibration registers for the appropriate ADC. The result of the full-scale calibration conversion is stored in the gain calibration registers for the appropriate ADC. With these readings, the calibration logic can calculate the offset and the gain slope for the input-to-output transfer function of the converter.

What is the Calibration logic used here?

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  • Chopping on delta sigma delta ADCs is a technique that can be used to cancel offset voltages and other low frequency errors. You can read more about it on the attached file.

    For the ADC conditions during calibration, it is recommended to use the slowest possible update rate to optimize the calibration accuracy. For the gain, set it to the intended application.


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