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AD9361 No-OS Rx DMA Cyclic Mode

Thread Summary

The user is trying to implement cyclic DMA for continuous data reception on the AD9361 Rx side using the No-OS driver. The final answer indicates that cyclic mode is not supported for capture DMA, and recommends using a double buffer scheme to ensure continuous data capture without loss. The user confirms that setting the C_CYCLIC parameter to 1 in the reference design allows cyclic DMA to work, but acknowledges that the double buffer scheme is a better approach. An additional answer provides a GitHub commit reference for configuring the DMAC for multiple transfers using interrupts.
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I am working on AD9361 with No-OS driver.

Sample code of the No-OS driver provides cyclic dma at the Tx side.

It is working very well.

Now, I want to use cyclic dma at the Rx side to receive data into ring buffer continuously, so that there is no data loss.

I set 'AXI_DMAC_REG_FLAGS' to one. However, it doesn't seem to work.

How can I use cyclic dma at the Rx side.

 

 

int32_t adc_capture(uint32_t size, uint32_t start_address)

{

---

 

 adc_dma_write(AXI_DMAC_REG_CTRL, 0x0);
 adc_dma_write(AXI_DMAC_REG_CTRL, AXI_DMAC_CTRL_ENABLE);

 adc_dma_write(AXI_DMAC_REG_IRQ_MASK, 0x0);

 // Cyclic Mode 0:OFF, 1:ON
 adc_dma_write(AXI_DMAC_REG_FLAGS, 0x1);

 adc_dma_read(AXI_DMAC_REG_TRANSFER_ID, &transfer_id);

 adc_dma_write(AXI_DMAC_REG_DEST_ADDRESS, start_addr);
 adc_dma_write(AXI_DMAC_REG_DEST_STRIDE, 0x0);
 adc_dma_write(AXI_DMAC_REG_X_LENGTH, length - 1);
 adc_dma_write(AXI_DMAC_REG_Y_LENGTH, 0x0);

 // Transfer Start
 adc_dma_write(AXI_DMAC_REG_START_TRANSFER, 0x1);

 /* Wait until the new transfer is queued. */
 do {
  adc_dma_read(AXI_DMAC_REG_START_TRANSFER, &reg_val);
 }
 while(reg_val == 1);

---

return 0;

}

Parents Reply
  • i am also trying to read the adc data using adc capture function..but i am unable to read the data coming from the adi dma controller.What i have done so far 

    1. The adc data in the form of I and Q signal connected to adc_util_packed fifo and the data is coming from the packed fifo and i am reading data in IL A

    2. When this data is coming to the adi dma controller and i connected ila probe to output of adi dma and in ILA there is no data coming out from the dma 

    What could be the reason for that . I am using adrv9361 z7035 in vivado 2018.3..Thanks in advance

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