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AD9361 No-OS Rx DMA Cyclic Mode

I am working on AD9361 with No-OS driver.

Sample code of the No-OS driver provides cyclic dma at the Tx side.

It is working very well.

Now, I want to use cyclic dma at the Rx side to receive data into ring buffer continuously, so that there is no data loss.

I set 'AXI_DMAC_REG_FLAGS' to one. However, it doesn't seem to work.

How can I use cyclic dma at the Rx side.

 

 

int32_t adc_capture(uint32_t size, uint32_t start_address)

{

---

 

 adc_dma_write(AXI_DMAC_REG_CTRL, 0x0);
 adc_dma_write(AXI_DMAC_REG_CTRL, AXI_DMAC_CTRL_ENABLE);

 adc_dma_write(AXI_DMAC_REG_IRQ_MASK, 0x0);

 // Cyclic Mode 0:OFF, 1:ON
 adc_dma_write(AXI_DMAC_REG_FLAGS, 0x1);

 adc_dma_read(AXI_DMAC_REG_TRANSFER_ID, &transfer_id);

 adc_dma_write(AXI_DMAC_REG_DEST_ADDRESS, start_addr);
 adc_dma_write(AXI_DMAC_REG_DEST_STRIDE, 0x0);
 adc_dma_write(AXI_DMAC_REG_X_LENGTH, length - 1);
 adc_dma_write(AXI_DMAC_REG_Y_LENGTH, 0x0);

 // Transfer Start
 adc_dma_write(AXI_DMAC_REG_START_TRANSFER, 0x1);

 /* Wait until the new transfer is queued. */
 do {
  adc_dma_read(AXI_DMAC_REG_START_TRANSFER, &reg_val);
 }
 while(reg_val == 1);

---

return 0;

}

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  • Hi, Lars.

    Thank you very much for your comment. It sounds very good idea. I will try it.

     

    By the way, I am using large ring buffer, which is ten times larger than one radio frame.

    So, if I can process one radio frame within one radio frame time, the ring buffer will work well.

    I changed the reference design:

    system_axi_ad9361_adc_dma_0.v.

    module system_axi_ad9361_adc_dma_0:

     

    .C_CYCLIC(0),

    ->

    .C_CYCLIC(1),

     

    then, Rx cyclic DMA worked!

     

    However, double buffer scheme would be better.

    Thank you very much again.

  • How did you achieve it, can you give me a reference?

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