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ADRV9029
Recommended for New Designs
The ADRV9029 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation...
Datasheet
ADRV9029 on Analog.com
Dear teams,
When I run the noorx version of dma_example.c in noos/project/adrv902x, the TX data captured with XSCT is 0. could you give me some advice?
boad: zcu102 + adrv9029
hdl main latest HEAD:5ead6f1a9fb88390efbf91c8ce97a888731af856
noos main latest HEAD: 37118746bcd3ce9a42ca11377773777898c28bb4
The serial port output is:
Opened with baud rate: 115200
Zynq MP First Stage Boot Loader
Release 2025.1 May 28 2026 - 06:04:32
PMU-FW is not running, certain applications may not be supported.
adrv9025-phy Rev 0, API version: 7.0.0.14 found
adrv9025-phy Rev 0, API version: 7.0.0.14 found
rx_clkgen: MMCM-PLL locked (245760000 Hz)
tx_clkgen: MMCM-PLL locked (245760000 Hz)
tx_adxcvr: OK (9830400 kHz)
rx_adxcvr: OK (9830400 kHz)
adrv9025-phy Rev 176, Firmware 7.0.0.11 API version: 7.0.0.14 Stream version: 9.4.0.1 successfully initialized via jesd204-fsm
tx_jesd status:
Link is enabled
Measured Link Clock: 245.761 MHz
Reported Link Clock: 245.760 MHz
Lane rate: 9830.400 MHz
Lane rate / 40: 245.760 MHz
LMFC rate: 7.680 MHz
SYNC~: deasserted
Link status: DATA
SYSREF captured: Yes
SYSREF alignment error: No
rx_jesd status:
Link is enabled
Measured Link Clock: 245.761 MHz
Reported Link Clock: 245.760 MHz
Lane rate: 9830.400 MHz
Lane rate / 40: 245.760 MHz
LMFC rate: 7.680 MHz
Link status: DATA
SYSREF captured: Yes
SYSREF alignment error: No
DMA_EXAMPLE Tx: address=0x8001e4f00 samples=8192 channels=8 bits=16
DMA_EXAMPLE Rx: address=0x8001ecf00 samples=65536 channels=4 bits=16
tx xsct cmd:xsct ../../tools/scripts/platform/xilinx/capture.tcl ZYNQ_PSU 0x8001e4f00 8192 8 16
rx xsct cmd:xsct ../../tools/scripts/platform/xilinx/capture.tcl ZYNQ_PSU 0x8001ecf00 65536 4 16
best regards,
zhangjinyu
Ramarao - Moved from Support ADRV9022/ADRV9026/ADRV9029 to FPGA Reference Designs. Post date updated from Thursday, May 28, 2026 6:47 AM UTC to Friday, May 29, 2026 9:04 AM UTC to reflect the move.
eserban - Moved from FPGA Reference Designs to Microcontroller no-OS Drivers. Post date updated from Friday, May 29, 2026 9:04 AM UTC to Tuesday, June 2, 2026 9:57 AM UTC to reflect the move.
Yesterday, after testing with this version, I observed an issue. It initially ran for about 30 minutes. Then, when I programmed it again, the execution reached:
status = adrv9025_init(&phy, &adrv9025_init_par);
and returned the following log:
Opened with baud rate: 115200
Zynq MP First Stage Boot Loader
Release 2025.1 May 28 2026 - 10:50:55
PMU-FW is not running, certain applications may not be supported.
ERR: /home/a/WORK/NOOS_PRJ/NOOS/no-OS17247/no-OS/projects/adrv902x/build/app/noos/drivers/rf-transceiver/madura/adrv9025.c:74:__adrv9025_dev_err(): adrv9025_setup, 1382: failed with Failed to reset device and set SPI Config (3)
ERR: /home/a/WORK/NOOS_PRJ/NOOS/no-OS17247/no-OS/projects/adrv902x/build/app/noos/drivers/rf-transceiver/madura/adrv9025.c:1273:adrv9025_init(): adrv9025_init: adrv9025_setup failed (-14)
Then I rolled back the HDL head to:
665ce2d7ee1fcfcdec23fcb52053bdaf41646ab3
and rolled back no-OS to:
17247d5f3b64a2f90d050c93ce2dd354a8016306
I tested the problematic ADRV9029 board No. 1 and another new ADRV9029 board No. 2 using the no-Rx dma_example. The result was that board No. 1 still reported the same error, while board No. 2 ran normally.
Could you please help investigate the possible cause?
There was definitely no hot-plugging of the FMC. The projects used were all official reference designs. I only changed the TX/RX RF frequency to 1842 MHz, and used a TX1-to-RX1 loopback on the development board.
Hello,
Your question has been moved to the Microcontroller no-OS Drivers forum for better assistance.
All the best,
Eric
Hello,
The DMA example is working correctly. The zero values are expected in your setup. The example sends a sine wave on TX via DMA, but to capture anything on RX, you need to physically connect a TX channel to an RX channel using an SMA cable. Without this loopback, the ADC has no signal to capture and will return zeros. Please refer to the DMA_EXAMPLE for more instructions.
Regarding board #1 failing, the "Failed to reset device and set SPI Config" error appears to be a hardware issue specific to that board, unrelated to the DMA example. The fact that board #2 runs correctly with the same code confirms the software is not the problem. We recommend checking the power supply and hardware connections on board #1.
All the best,
Eric
hi eserban,
thanks for your reply,
I need to provide further supplementary explanation for my question.
The example sends a sine wave on TX via DMA, but to capture anything on RX, you need to physically connect a TX channel to an RX channel using an SMA cable.
i had loopback tx to rx via sma cable. and had changed the TX/RX RF frequency to the same freq 1800 MHz.
The example sends a sine wave on TX via DMA, but to capture anything on RX
capture anthing on RX and TX.
The fact that board #2 runs correctly with the same code confirms the software is not the problem.
software hdl-old:(SHA:665ce2d7ee1fcfcdec23fcb52053bdaf41646ab3)and noos-old(SHA:17247d5f3b64a2f90d050c93ce2dd354a8016306) have no problem and confirms board #1 have problem.
Actually, I suspect that the issue occurred on my board #1 after running HDL-latest (SHA: 5ead6f1a9fb88390efbf91c8ce97a888731af856) and noos-latest (SHA: 37118746bcd3ce9a42ca11377773777898c28bb4). These two versions are different from hdl-old / noos-old; for example, they include the following updates:
library/axi_dmac: Fix parsing error for bitfield selections. · analogdevicesinc/hdl@fefdc2e · GitHub
Constify init_param in DMA, UART, and MDIO APIs · analogdevicesinc/no-OS@16a3631 · GitHub
I suspect that the current issue with the ADRV9029 may be related to running the latest software.
We recommend checking the power supply and hardware connections on board #1.
Thanks. I will check the power supply and hardware connections on board #1 first and confirm whether the issue is related to the hardware setup.
But could you help explain why the data captured by both rx_dma and tx_dma is all zeros?
best regards,
jthy
Hello,
We will try to reproduce the issues you are experiencing. In the meantime please mention where you made the frequency changes. Was it in the ActiveUtilInit_profile.h file (no-OS/projects/adrv902x/src/common/firmware/ActiveUtilInit_profile.h) or somewhere else?
All the best,
Eric
Was it in the ActiveUtilInit_profile.h file (no-OS/projects/adrv902x/src/common/firmware/ActiveUtilInit_profile.h)
hi eserban ,
Yes, it was located in:
no-OS/projects/adrv902x/src/common/firmware/ActiveUtilInit_profile.h
best regards,
jthy
Hello,
We found the reason why reading TX and RX returns only 0s.
The addresses provided by the DMA_EXAMPLE are represented on 36 bits:
DMA_EXAMPLE Tx: address=0x8001e4f00 samples=8192 channels=8 bits=16 DMA_EXAMPLE Rx: address=0x8001ecf00 samples=65536 channels=4 bits=16
address is declared as uint32_t, so the 36-bit addresses are silently truncated to 32 bits. This doesn't cause instability as both the CPU writes and the DMA hardware register receive the same truncated address. The problem only appears when using the 36-bit address in the xsct capture commands, which reads a location that was never written.
The correct commands (in this specific case):xsct ../../tools/scripts/platform/xilinx/capture.tcl ZYNQ_PSU 0x001e4f00 8192 8 16
xsct ../../tools/scripts/platform/xilinx/capture.tcl ZYNQ_PSU 0x001ecf00 65536 4 16
orxsct ../../tools/scripts/platform/xilinx/capture.tcl ZYNQ_PSU 0x1e4f00 8192 8 16
xsct ../../tools/scripts/platform/xilinx/capture.tcl ZYNQ_PSU 0x1ecf00 65536 4 16
This is just a temporary workaround until we fix the bug. Thank you for your patience.
All the best,
Eric
Hello,
Are there any updates regarding this issue?
All the best,
Eric