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EVAL-AD7606 no-OS: Parallel Interface Support Status and "getting samples error" on ZC702

Thread Summary

The user encountered a 'getting samples error' when using the parallel interface of the AD7606 on ZC702, despite successful initialization. The final answer confirms that the no-OS driver now supports parallel mode and provides HDL and no-OS fixes tested on ZedBoard. The user should update their local branches with the provided commits and verify the DDR buffer address for ZC702.
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Category: Hardware
Product Number: EVAL-AD7606

Hi,

I tested the EVAL-AD7606CFMCZ and then ported the design to ZC702.

For the serial interface, the no-OS driver works correctly and I can read valid data.

For the parallel interface, the initialization completes successfully, but when trying to acquire samples I get a "getting samples error".

I found this related discussion (from about 3 years ago), which suggests that the AD7606 no-OS driver only supports serial mode:Cannot initialize EVAL-AD7606B-FMCZ (no-OS project) - Q&A - FPGA Reference Designs - EngineerZone. I also noticed the following comment in the source code:

/* Driver currently supports only serial interface, therefore, ... */

So I would like to confirm:

  1. Is the parallel interface still not supported in the current no-OS driver, or has this been updated/fixed in newer versions?
  2. If parallel mode is now supported, are there any additional configurations or required changes (especially for porting to another device like ZC702)?

Any clarification would be appreciated.

Thanks.

Thread Notes

Parents
  • Hello,

    In order to help you the best we can, we first need to know which versions of the HDL and no-OS GitHub repositories you're using. If you're not using the latest versions, this might be the cause of your issues.

    1. The no-OS driver for AD7606 has been updated last year and it now supports the serial interface as well as the parallel interface. Here is the link to the project on GitHub: no-OS/drivers/adc/ad7606 at main · analogdevicesinc/no-OS

    2. Unfortunately we have no support for EVAL-AD7606CFMCZ on the ZC702, but the jumper configuration should be the same as on the ZedBoard (AD7606X-FMCZ HDL project — HDL documentation). Also, here is our generic guide for porting HDL projects to different carriers: Porting ADI’s HDL reference designs — HDL documentation.

    Please try these changes and look over the provided resources, and see if it solves your issues.

    All the best,
    Eric

  • Hello, some supplement:

    Here are the ILA results in Vivado, I set a break point after sentence " ret = ad7606_capture_pre_enable(dev);", where I think all initialization is done and I see signals in this figure. I think the only problem that there is no valid data, so reading process is running but data is not sent through DMA to memory. I am a bit confused here, because I basically don't change much in Vivado during porting as I only deleted some hdmi and other input definition, which should not influence ADC structure

  • Hello,

    Unfortunately we've had multiple problems with this driver, so we are starting an internal process to see if we can find and fix these issues. This may take a while, so in the meantime feel free to ask any other questions in our forums.

    Thank you for your patience,

    Eric

  • Hi,

    Thanks for feedback!

    I would like to share my current status, as the figure shows the ADC IPs are working correcting. I suspect the problems are located at the function " ret = ad7606_read_samples(dev, buf, AD7606X_FMC_SAMPLE_NO);" in no-OS codes. As a writing done flag should be sent and data will be written into DDR in my understanding, however what I observe is in the function "ret = axi_dmac_transfer_wait_completion(axi->dmac, 1000)" transfer cannot be completed and finally communication fails.

    Thanks

Reply
  • Hi,

    Thanks for feedback!

    I would like to share my current status, as the figure shows the ADC IPs are working correcting. I suspect the problems are located at the function " ret = ad7606_read_samples(dev, buf, AD7606X_FMC_SAMPLE_NO);" in no-OS codes. As a writing done flag should be sent and data will be written into DDR in my understanding, however what I observe is in the function "ret = axi_dmac_transfer_wait_completion(axi->dmac, 1000)" transfer cannot be completed and finally communication fails.

    Thanks

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