Hello,
I am currently working on a project using a ZedBoard with an AD9434 FMC board and I am having an issue with the captured ADC data. I started this work by following the Analog Devices documentation available here:
https://analogdevicesinc.github.io/hdl/projects/ad9434_fmc/index.html
This page is what guided me to the HDL reference design used for this project.
I then used the official Analog Devices HDL project for the ZedBoard with Vivado 2023.2 on Linux:
https://github.com/analogdevicesinc/hdl/tree/main/projects/ad9434_fmc/zed
The bitstream was generated successfully and I exported the hardware including the bitstream, which produced an .xsa file.
On the software side, I am also using Vitis 2023.2 on Linux. I created a platform project from the generated .xsa file. For the application, I used the no-OS project provided by Analog Devices:
https://github.com/analogdevicesinc/no-OS/tree/main/projects/ad9434-fmc-500ebz/src
I built the project following the instructions from:
https://wiki.analog.com/resources/no-os/build
This allowed me to generate a valid .elf file. In Vitis, I used a simple example application (HelloWorld) and replaced its ELF file with the one generated by the no-OS build in order to run the application on the board.
For the ADC input, I am using a function generator with a sinusoidal signal at 20 MHz and 1.5 Vpp. The AD9434 is configured to use its internal clock at 500 MSPS (datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ad9434.pdf).
The capture process seems to work correctly. In the terminal, I can see the “capture done” message at the end of the execution, which suggests that the DMA transfer completed successfully.
However, the captured values do not match what I expect at all. I added some debug code in the application just after the following line (around line 168 in the no-OS project):
Xil_DCacheInvalidateRange((uintptr_t)ADC_DDR_BASEADDR, 16384 * 2);
The purpose of this code is simply to read back the ADC samples written by the DMA into DDR and print some of them for inspection. The code I added is the following:
/* ## DISPLAY AD9434 ADC VALUES (12-bit two's complement) */
uint16_t *adc_data_ptr = (uint16_t *)ADC_DDR_BASEADDR;
uint32_t samples_to_display = 10600;
pr_info("----- START ADC DATA DISPLAY (12-bit Two's Complement) -----\n");
for (uint32_t i = 10000; i < samples_to_display; i++) {
uint16_t raw_value = adc_data_ptr[i];
raw_value &= 0x0FFF;
int16_t raw_signed = (int16_t)(raw_value);
int16_t final_sample;
if (raw_value & 0x0800) {
final_sample = (int16_t)(raw_value | 0xF000);
} else {
final_sample = (int16_t)raw_value;
}
pr_info("Sample[%lu] = %d (Raw hex: 0x%03X), raw dec = %d\n", i, final_sample, raw_value, raw_signed);
}
pr_info("----- END ADC DATA DISPLAY -----\n");
pr_info("ADC base address: %p\n", adc_data_ptr);
/* ## END DISPLAY */
The ADC base address printed by the software is:
ADC base address: 0x1000000
I also wrote a small Python script to plot the captured samples. Instead of obtaining a sine wave similar to the input signal, I get a completely incorrect waveform (see attached image). Moreover, when I change the input signal (frequency or amplitude), the output waveform remains almost the same. This makes me think that the values I am printing might not actually correspond to the real ADC samples, or that there is an issue with data format, alignment, or memory mapping.
At this point, I am not sure where the problem comes from or why I am not visualizing the correct ADC values. Any help or guidance on what to check next would be greatly appreciated.
Thank you.
