Hi,
I am working with an AD9361 connected to a Zynq XC7Z045 board. In my initial setup, I used the standard 2T2R configuration with a sampling rate of 61.44 MSPS, and the system was functioning correctly — I was able to capture and transmit data successfully.
To move toward a single-channel configuration (1T1R) operating at a 122.88 MSPS sampling rate, I made the following changes:
- In Vivado Block Design, I set the AXI_AD9361 IP core mode from 2T2R to 1T1R.
- In the SDK/Vitis application, I updated:
two_rx_two_tx_mode_enable= 0- Sampling rate in the AD9361 initialization function to
122880000 Hz.
After regenerating the bitstream and exporting the hardware to SDK, the application builds and runs without any compile-time errors. However, when I try to connect to the hardware from Vivado Hardware Manager, I receive the following message:
[Labtools 27-3361] The debug hub was not detected.Even if I revert the sampling rate to 61.44 MSPS and keep the system in 1T1R mode, the same error persists.
Could someone please help me understand why the debug hub is not being detected after switching to 1T1R mode?
Is there any additional configuration required in the block design or constraints to support the single-channel setup?
and all the pins that i am using are in LVDS standard.
Any guidance or suggestions would be greatly appreciated.
Best regards,
