Hi,
I'm trying to run no-OS on a KC705 eval board with the FMC DAQ2. Mainly using release 2023.R2 for both HDL and no-OS, although I've tried main branch pulls right before support for the KC705 ended and have had the same problems. Currently using none of my own logic, just the plain HDL and no-OS builds. The symptom is that when I select the full 1000 MSPS ADC sample rate, I get a PN9 and PN23 sequence mismatch error (see attached screenshot) and junk data from the ADC, very similar to some of these questions RE: ADC test sequence mismatches - noos on zc706, FMCDAQ2 FMCDAQ2-EBZ + iW-RainboW-G35M . The DAC side is functioning correctly with no issues as far as I can tell. When I select a lower sample rate, everything goes through smoothly and it passes the PN tests. From what I can gather in these posts, the fix for these other FPGA boards seemed to be enabling QPLL instead of CPLL for RX, but from what I can tell the more modern versions of the drivers do this by default. I have tried enabling CPLL instead while troubleshooting and get similar results. Can anyone provide suggestions? Am I doing something wrong?
