STM32 No-OS ADRV9003

Nope, you need  programmable logic to process data to/from adrv9001 family chips. See the document provided by ConradCollins above.

Nope, you need  programmable logic to process data to/from adrv9001 family chips. See the document provided by ConradCollins above.

Hi, we developed our custom board xilinx-(Kintex) ultra-scale plus which can support multiple different adc. We have our DSP solution IP, we want to configure ADRV9003 via spi and the DSP in FPGA. Our device is pure FPGA not SoC.

So have to understand SPI interface . Since it is not open (registers), we try to find simple solution for this application: Open ADC, only use of RX2A port, sent carrier frequency and AGC. Can you suggest a simple solution, No-OS, STM32?

Hi, When i try to build STM32 (NO-OS) (Ubuntu); I have "No rule to make target" error for xilinx_axi_io.c file in generic.mk:293: recipe for target 'all' failed. 

So BilginV I don't get it, do you use STM32 or a pure FPGA hardware ?

BilginV said:

Our device is pure FPGA not SoC

BilginV said:

STM32

Is STM32 just for the proof of concept, whether you can change carrier frequency and AGC over SPI ?

If you want to use STM32 as a processor you'd have to modify these files:
https://github.com/analogdevicesinc/no-OS/tree/master/projects/adrv9001/src/hal

Specifically no_os_platform.c/.h and parameters.h

But still you'd need a digital interface to an FPGA like I said in my first reply.

I would recommend against such a dual design. Get a SoC that integrates the processor and FPGA as our reference project shows. I'm skeptical that we will ever provide a reference project for a dual design (STM32 processor + separate FPGA).

Yes, STM32 is just PoC, we want to see STM32 can configure ADRV9003 or not, then we are going to implement same SPI stream via ROM(FPGA) . 

Hi, since we couldnt find any solution with pure FPGA. We have tried to control ADRV9003 via stm32. we dont have dual architecture. STM32 will show the the solution which can be implemented in the fpga (RTL). There shall be some solution which lead us to use multiple ADRV9003 with single FPGA. Also, we want use our own DSP IPs to enhance performance.

Best Regards