SoC processor too slow for real-time processing

Dear all,

     We are trying to capture data from ADRV9009 by using ZCU102. We use No-OS project to real time capture data.

During our work, we observed that No-OS code is able to successfully capture data data blocks at very high-rate (122.22 MSPS ), however, the processor in SoC works very slow and cannot process the data within the time between capturing data blocks. To make an estimate of the processing time, we performed following experiment.

In headless.c file, we put the axi_dmac_transfer() function in a while(1) loop, like this

while(1)
        {

            axi_dmac_transfer(rx_dmac,
                  DDR_MEM_BASEADDR + 0x800000,
                  NUM_OF_SAMPLES_PER_CHANNEL * TALISE_NUM_CHANNELS *
                  DIV_ROUND_UP(talInit.jesd204Settings.framerA.Np, 8));

        }

In axi_dmac.c file, we added following global counters

uint32_t timeout0 = 0, timeout1 = 0, timeout2 = 0,  count_time = 0;

Then in axi_dmac_transfer() function, we incremented these counters like this (Modified code after line 267 is provided)

if (dmac->flags & DMA_CYCLIC)
        return SUCCESS;
    count_time++;
    /* Wait until the new transfer is queued. */
    do {
        timeout0++;
        axi_dmac_read(dmac, AXI_DMAC_REG_START_TRANSFER, &reg_val);
    } while(reg_val == 1);

    /* Wait until the current transfer is completed. */
    do {
        timeout1++;
        axi_dmac_read(dmac, AXI_DMAC_REG_IRQ_PENDING, &reg_val);
        if (reg_val == (AXI_DMAC_IRQ_SOT | AXI_DMAC_IRQ_EOT))
            break;
    } while(!dmac->big_transfer.transfer_done);
    if (reg_val != (AXI_DMAC_IRQ_SOT | AXI_DMAC_IRQ_EOT))
        axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_PENDING, reg_val);

    /* Wait until the transfer with the ID transfer_id is completed. */
    do {
        timeout2++;
        axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_DONE, &reg_val);
    } while((reg_val & (1u << transfer_id)) != (1u << transfer_id));

    if (count_time>=1000){
        count_time =0;
    }

We set breakpoint a within the below-mentioned loop to see the value of these counters for 1000 executions of axi_dmac_transfer() function

   if (count_time>=1000){
        count_time =0;
    }

We noted following value of counters for two different values of size of data (We set the data size by varying  NUM_OF_SAMPLES_PER_CHANNELvariable while calling axi_dmac_transfer function in headless.c file).

If we set NUM_OF_SAMPLES_PER_CHANNEL to 128

count_time=1000

time_out1=4079

This shows that SoC processor can almost execute only  4 instructions (time_out1/count_time =4)  between capturing two blocks of 128 samples.

If we set NUM_OF_SAMPLES_PER_CHANNEL to 3712

count_time=1000

time_out1=84909

This shows that SoC processor can almost execute only 85 instructions (time_out1/count_time =85)  between capturing two blocks of 3712 samples.

Hence, we have concluded that SoC processor is not able to perform processing between the capturing of two blocks

Can anyone guide us that how can we perform real-time processing in SoC

Many thanks,

Best regards,

Avais