zcu102 adrv9002 no-os error

Hi mori ,

I just did some tests and it seems we are indeed having issues with the DAC_DMA_EXAMPLE on this project. We'll come back with a fix.

Hi Kazuyuki,

Please see this pull request for the fix and report back if this fixes the problem for you:

https://github.com/analogdevicesinc/no-OS/pull/1355

BTW, the fix is already on the latest master.

Hi buha,

Thank you for your prompt reply.

It seems working well when "ADRV9002_RX2TX2" was not defined.

Thank you very much for fixing it quickly.

However, the same error (below) occurred when "ADRV9002_RX2TX2" was defined.

adrv9002_post_setup() failed with status -5

By the way, what does "ADRV9002_RX2TX2" mean?

I thought that "ADRV9002_RX2TX2" meant to use 2Rx/2Tx channels as following code in headless.c.

#if defined(ADRV9002_RX2TX2)
    phy.rx2tx2 = true;
#endif

In that case, why "#if'n'def" instead of "#ifdef" was used in other part of the headless.c ?

The reason why I ask this is that I want to use 1Rx channel and 1Tx channel of ADRV9002 in my project.

Best regards,

Kazuyuki

------------------------------------------------------------------------------

Here are test results:

When I wrote following definition on the top of headless.c,

#define DMA_EXAMPLE
#define XILINX_PLATFORM

the console output was as follows:

Xilinx Zynq MP First Stage Boot Loader
Release 2021.1 Apr 29 2022 - 13:54:08
PMU-FW is not running, certain applications may not be supported.
Hello
ADRV9002 Rev 12.0, Firmware 0.20.0.10 API version: 48.49.2 successfully initialized
axi-adrv9002-rx-lpc: Successfully initialized (61444091 Hz)
axi-adrv9002-tx-lpc: Successfully initialized (61444091 Hz)
axi-adrv9002-rx2-lpc: Successfully initialized (61444091 Hz)
axi-adrv9002-tx2-lpc: Successfully initialized (61444091 Hz)
DMA_EXAMPLE: address=0x1438d0 samples=32768 channels=2 bits=16
DMA_EXAMPLE: address=0x13b8d0 samples=32768 channels=2 bits=16
Bye

(Successful)

When I wrote following definition on the top of headless.c,

#define XILINX_PLATFORM
#define DMA_EXAMPLE
#define ADRV9002_RX2TX2

the console output was as follows:

Xilinx Zynq MP First Stage Boot Loader
Release 2021.1   Apr 29 2022  -  14:09:04
PMU-FW is not running, certain applications may not be supported.
Hello
ADRV9002 Rev 12.0, Firmware 0.20.0.10 API version: 48.49.2 successfully initialized
adrv9002_post_setup() failed with status -5

(Failure)

mori

I agree the name of this define is confusing so I'll explain it in brief.

ADRV9002_RX2TX2 is a define that does what the -rx2tx2 postfixed linux device trees do, which is to use one DMA controller for both rx1 & rx2 and one single DMA controller for both tx1 & tx2. This is in contrast to using a DMA controller for each rx1, rx2, tx1, tx2 separately.

If you want to use just rx1 and tx1, then you don't need the ADRV9002_RX2TX2 define active, just ignore it, don't activate it. You probably need just to comment out any occurrence of anything related to rx2 and tx2 in headless.c, there is no ready-made define that makes what you want.

Dear buha,

Thank you for the explanation.

I ignored the definition and comment out anything related to rx2 and tx2,

then I could use only rx1 and rx2.

Thank you very much!

Best regards,

Kazuyuki

Hai buha,

I am working on 2nd channel i.e TX2 &RX2 enabled case.

In this case

#if defined (ADRV9002_RX2TX2)

phy.rx2tx2 = true;

#endif

In headless.c file the above command enable required or not..?

by uncomment the above one i am getting below error i.e

In rx2tx2, RX2 rate=1920000 must be equal to RX1, rate=0

and  

by comment the above one i am getting another error i.e

axi-adrv9002-rx-lpc: Status errors
axi_adc_init_finish() failed with status -1

if you know about this, please let me know.

Best regards,

Yamuna