No-os IIO initialization

Hi andvezerski ,
It is quite likely that the server didn't start. You can check this by following execution with a debugger.

If the server did start, then it's likely a UART baudrate (or other) problem.

Hi,

I did not find in the code the lines about running the IIOD server (in NOOS 19r2).

I installed Vitis 2021.1. Now i am using master HDL and master NOOS. 

But, in the HDL design I changed UART1 to UART0  (because I saw that the USB-UART controller on Zedboard does not support speeds above 230000 baud).

When I try to build a project with IIO support (make TINYIIOD=y), I get the following message:

When I try to build a project without IIO support:

Until I understand what the problem is. Maybe something needs to be uncommented?

Can you please provide some info about where exactly does the code fail in debugger ?

This is the line that prints the message, so use step-by-step debugging to find the function that makes ad9361_init() fail. Looking at the code, it could be a clocking issue but let's see your output)

github.com/.../ad9361_api.c

Hi, thx for answers

Sorry, I've hardly used SDK/Vitis before. Do I understand correctly that after using make TINYIIOD=y I should use make sdkopen?
Next, click Debug -> SystemDebugger_app_system ?

Yes, that's true, and then use the step-by-step debugging (F5/F6) to get to the code that fails and post a screenshot here with the exact location where a function returns a negative error code.

Hi, sorry it took so long

I think it is a function ad9361_post_setup in ad9361_api.c

...if I did everything right.

After ad9361_setup(phy) and ad9361_register_clocks(phy) ret was equal 0. 

P.S.

I'm not very familiar with C, but ret becomes -5 on the line 564(ad9361_conv.c):

ret = ad9361_dig_tune_tx(phy, max_freq, flags);

andvezerski ,

I'm not familiar myself with the digital tuning on ad9361, but here's a link that may shed some light on how digital tuning works in ADI's linux and no-OS:

https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/interface_timing_validation

As a general principle, if our reference project digital tuning fails, it's likely because it's running on a custom hardware that needs some tweaking until digital interface works within parameters. Can you please confirm what exact hardware you have ?

Meanwhile I will try to get somebody more knowledgeable about this chip to join the thread.

Hi, 

-Can you please confirm what exact hardware you have ?

Zedboard revD + AD-FMCOMMS2

So andvezerski  I did some tests on hardware, it seems there are issues with this hardware combination in 2019_R2.

However, by running with master HDL and no-OS, the ad9361 digital tuning works fine and the IIOD server starts successfully, I am able to connect to it using IIO-Oscilloscope.

There are 2 issues here that may be affecting you:

1) Possible problem in either HDL or no-OS regarding digital tuning.

2) ZedBoard has a documented issue with 921600 baudrate over its Cypress USB-Serial converter, so please change the UART_BAUDRATE in parameters.h to 115200 and configure IIO-Oscilloscope to 115200, this should get you to connect to the server.

Hi buha, thx.

I'm leaning more towards issue 1. The problem manifests itself just when executing the function ad9361_dig_tune_delay in ad9361_dig_tune_tx. 

as a result, ret = -5. If I manually change ret to 0, then there are no further problems with initialization: 

I'll try to figure this out: wiki.analog.com/.../interface_timing_validation

As for the speed 921600: the HDL-design uses UART1, which passes through the Cypress controller (it seems to support no more than 230000). In the HDL design I changed UART1 to UART0 (Pmod header). As far as I understand, then the UART signal goes around the Cypress controller. Next, I use a USB-TTL cable and the UART works (at least the terminal).