AD7134 SPI registers and ODR

After setting the ODR_VAL_INT_x And the MASTER_SLAVE_TX_BIT, can you do a readback and see if the MASTER_SLAVE_TX_BIT was cleared?

Also, are you setting the ODR_RATE_SEL_CHx for your specific channel?

I solved the write to ODR registers by a continual loop that sets the MASTER_SLAVE_TX_BIT, then checks the value, then writes again if it hasn't changed.  This seems flukey but it works for now.  Please provide a detailed procedure for the proper method.

Regarding the ODR_RATE_SEL_CHx , I'm leaving them all at the default value of 0x0.

Now I'm running into a different problem.  I am able to set the ODR to 750kHz rate, but the ADC is only sampling a few times each cycle.  I'm only getting back about 10 samples instead of around 750.

Hello,

The correct way to change the ODR should be to first write registers 0x16 to 0x1C with the desired values and then writing 1 to the 0xF register. This should update the data rate.

Is the ODR changed correctly when you do it like this? If you are using the example on github then you should see the ODR increase. 

Regards,
Andrei

Hello,

The correct way to change the ODR should be to first write registers 0x16 to 0x1C with the desired values and then writing 1 to the 0xF register. This should update the data rate.

Is the ODR changed correctly when you do it like this? If you are using the example on github then you should see the ODR increase. 

Regards,
Andrei

Yes, changing the ODR works correctly and I can see the resulting change in the output signal.

What I still don't understand is why I don't see more than 10 different ADC values returned.  My input signal is 1kHz and my ODR rate is 750kHz.  I would expect to see 750 distinct values as the sin wave varies over the cycle.  Instead I'm seeing only about 10 values repeated over and over.

Hello,

I will try to investigate this a little in the next couple of days to try to reproduce the problem and maybe fix it. Will report the results here.

The program should work the way you are using it.

Regards,
Andrei

One thing to try if you want to change the ODR to something higher is to make sure you are using the right filter option. Using register 0x1E you have to change to sinc3 filter since the default filter is the bandwidth one and it's ODR only rises to 374k.

Let me know how that works. In the meantime I will research the ODR issue some more.

Regards,
Andrei

I tried changing DIGFILTER_SEL_CH0 to 0x02, but the problem is still the same.

Can you tell me your settings for JP14, JP15, JP16, and JP17?

Hello,

JP14 = open;
JP15 = shorted;
JP16 = open;
JP17 = shorted

Thanks.  Have you been able to reproduce my problem?

I think I have something similar, but I need to investigate further. Problem may come from different sources. 

Unfortunately, it might take me a bit longer.

Regards,
Andrei.

Andrei,

It's good to hear that someone else has confirmed these issues.

I think the problem may lie more with the HDL code. I currently have the analog input on CH0 shorted together so that I should be reading a value very close to 0x000000.

This is the scope output. Note that DOUT0_1 shows most of the high order bits as 0.

This is the corresponding output from the COM port.  Note that CH0 output is not registering the same thing:

I changed the input to +4.0 volts, tied all the CHx inputs in parallel, and ran the same test. Here's the results: