Data content modification of DMA DAC for AD9364

I'm using ADRV9364-z7020 in no-os mode. I would like to transmit and receive data at same time. I want to send data only once (not in cyclic mode).

I would need to modify data to be transmitted. My idea has been initialize DAC with dac_init() and then modify content of memory in the main loop (address DAC_DDR_BASEADDR). Content of memory has to be modified before it is transmitted. I'm looking for value of AXI_DMAC_REG_CURRENT_SRC_ADDR in the main loop, which should indicate the current address.

My problem is that even though I change the content of  DAC_DDR_BASEADDR memory, it does not change actual data to be transmitted. What I would need to do to make sure that changing the memory content have effect?

Top Replies

    •  Analog Employees 
    May 24, 2021 +1 suggested

    Hi rf-engineer,

    Sorry for such long reply rate from the team.

    Are you still having the issue ? Sounds like a cache flush issue.

    We have a project (projects/ad9361) which can be configured to build for ad9364…