HMC7043 no os driver cannot create precise clock

Hi there,

I am using HMC7043 to create clock 245.76Mhz on channel 2-4-6-8-10  and 960kHz as reference clock on channel 11. However, when I use driver of 7043 supported by ADI, channel 4-6-8-10 ouputs with clock of 960kHz while channel 2 output has weird behavior of clock 148Mhz. 

Here is my configuration for 7043:

struct hmc7044_init_param hmc7043_param = {
.spi_init = NULL,
.is_hmc7043 = true,
.clkin_freq = {122880000, 0, 0, 0},
//.vcxo_freq = 122880000,
//.pll2_freq = 2457600000,
//.pll1_loop_bw = 200,
.sysref_timer_div = 1280,
.in_buf_mode = {0x07, 0x07, 0x00, 0x00, 0x00},
.gpi_ctrl = {0x00, 0x00, 0x00, 0x00},
.gpo_ctrl = {0x0f, 0x09, 0x35, 0x01},
.num_channels = 14, //<-- number of channels in .channels.
.pll1_ref_prio_ctrl = 0xB1,
.sync_pin_mode = 0x1,
.high_performance_mode_clock_dist_en = true,
.high_performance_mode_pll_vco_en = true,
.pulse_gen_mode = 0x07,
.channels = chan_spec
};

struct hmc7044_chan_spec 7043_chan_spec[14] = {
/* FPGA0_CLK */
{
.disable = 0, .num = 2, .divider = 5, .driver_mode = 2,
.start_up_mode_dynamic_enable = false
},
/* FMC_CLK */
{
.disable = 0, .num = 4, .divider = 5, .driver_mode = 2,
.start_up_mode_dynamic_enable = false
},
/* FPGA2_CLK */
{
.disable = 0, .num = 6, .divider = 5, .driver_mode = 2,
.start_up_mode_dynamic_enable = false
},
/* FPGA3_CLK */
{
.disable = 0, .num = 8, .divider = 5, .driver_mode = 2,
.start_up_mode_dynamic_enable = false
},
/* FPGA4_CLK */
{
.disable = 0, .num = 10, .divider = 5, .driver_mode = 2,
.start_up_mode_dynamic_enable = false
},
/* FMC_SYSREF */
{
.disable = 0, .num = 11, .divider = 1280, .driver_mode = 2,
.start_up_mode_dynamic_enable = false
}
};

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  • 0
    •  Analog Employees 
    on Dec 11, 2020 3:21 PM

    Hi,

    Can you give us more details about your hardware?

    Thanks,
    Dragos

  • Hi Dragos,

    I want to create clock 245.76Mhz on channel 2-4-6-8-10 of HMC7043 and 960kHz on channel 11 of 7043 is SYSREF clock. 

    The input clock of 7043 is received from HMC7044 with 1228800000 (~1.2Ghz) and SYSREF for 7043 is 960kHz.

    The problem is that on channels 4-6-8-10 output is the same with 960kHz and channel 2 outputs a weird clock.

    I am using the driver of ADI on linux and it work, but driver for no-os does not work as expected

    Bests,

    Tung Anh

  • 0
    •  Analog Employees 
    on Dec 14, 2020 9:39 AM in reply to LeoTungAnh

    I thought that there was a mismatch in driver-mode configuration, some channels have it set to 0 (CML) and some have it set to 2 (LVDS) but this is only for your hmc7044 linux config, and not the hmc7043, my bad !

    Do you also initialize hmc7044 on no-os ? If so, could you do the same thing I sugested above for your hmc7044 channel config structure on no-os ? 

  • yes, I use no-os config for 7044 too. I will try to configure the same thing between 2 versions and let know the result soon

  • here is my code which is used for config 7044 :

    struct hmc7044_chan_spec chan_spec_7044[14] = {
    /* HMC7043_CLK */
    {
    .num = 0, .disable = 0, .start_up_mode_dynamic_enable = false, .divider = 2, .driver_mode = 2
    },

    /* HMC7043_SYSREF*/
    {
    .num = 1, .disable = 0, .start_up_mode_dynamic_enable = true, .divider = 2560, .driver_mode = 2
    //.disable = 0, .num = 1, .divider = 2560, .driver_mode = 2,
    //.start_up_mode_dynamic_enable = true//,
    //.coarse_delay = 15
    },
    /* ADRV0_CLK */
    {
    .num = 2, .disable = 0, .start_up_mode_dynamic_enable = false, .divider = 10, .driver_mode = 2
    // .disable = 0, .num = 2, .divider = 10, .driver_mode = 2,
    // .start_up_mode_dynamic_enable = false
    },
    /* ADRV0_SYSREF */
    {
    .num = 3, .disable = 0, .start_up_mode_dynamic_enable = false, .divider = 2560, .driver_mode = 2
    // .disable = 0, .num = 3, .divider = 2560, .driver_mode = 2,
    // .start_up_mode_dynamic_enable = false
    },
    /* ADRV2_CLK */
    {
    .num = 4, .disable = 0, .start_up_mode_dynamic_enable = false, .divider = 10, .driver_mode = 2
    // .disable = 0, .num = 4, .divider = 10, .driver_mode = 2,
    // .start_up_mode_dynamic_enable = false
    },
    /* ADRV2_SYSREF */
    {
    .num = 5, .disable = 0, .start_up_mode_dynamic_enable = false, .divider = 2560, .driver_mode = 2
    // .disable = 0, .num = 5, .divider = 2560, .driver_mode = 2,
    // .start_up_mode_dynamic_enable = false
    },
    /* DEV_CLK */
    {
    .num = 6, .disable = 0, .start_up_mode_dynamic_enable = false, .divider = 10, .driver_mode = 2
    // .disable = 0, .num = 6, .divider = 10, .driver_mode = 2,
    // .start_up_mode_dynamic_enable = false
    },
    /* DEV_CLK */
    {
    .num = 7, .disable = 0, .start_up_mode_dynamic_enable = false, .divider = 2560, .driver_mode = 2
    // .disable = 0, .num = 7, .divider = 2560, .driver_mode = 2,
    // .start_up_mode_dynamic_enable = false
    },
    /* ADRV4_CLK */
    {
    .num = 8, .disable = 0, .start_up_mode_dynamic_enable = false, .divider = 10, .driver_mode = 2
    // .disable = 0, .num = 8, .divider = 10, .driver_mode = 2,
    // .start_up_mode_dynamic_enable = false
    },
    /* ADRV4_SYSREF */
    {
    .num = 9, .disable = 0, .start_up_mode_dynamic_enable = false, .divider = 2560, .driver_mode = 2
    // .disable = 0, .num = 9, .divider = 2560, .driver_mode = 2,
    // .start_up_mode_dynamic_enable = false
    },
    /* ADRV3_CLK */
    {
    .num = 10, .disable = 0, .start_up_mode_dynamic_enable = false, .divider = 10, .driver_mode = 2
    // .disable = 0, .num = 10, .divider = 10, .driver_mode = 2,
    // .start_up_mode_dynamic_enable = false
    },
    /* ADRV3_SYSREF */
    {
    .num = 11, .disable = 0, .start_up_mode_dynamic_enable = false, .divider = 2560, .driver_mode = 2
    // .disable = 0, .num = 11, .divider = 2560, .driver_mode = 2,
    // .start_up_mode_dynamic_enable = false
    },
    /* EX_CLK */
    {
    .num = 12, .disable = 0, .start_up_mode_dynamic_enable = false, .divider = 2, .driver_mode = 0
    // .disable = 0, .num = 12, .divider = 2, .driver_mode = 0,
    // .start_up_mode_dynamic_enable = false
    },
    /* EX_SYSREF */
    {
    .num = 13, .disable = 0, .start_up_mode_dynamic_enable = false, .divider = 2560, .driver_mode = 0
    // .disable = 0, .num = 13, .divider = 2560, .driver_mode = 0,
    // .start_up_mode_dynamic_enable = false
    }
    };

    struct hmc7044_init_param hmc7044_param = {
    .spi_init = NULL,
    .clkin_freq = {0, 0, 0, 122880000},
    .vcxo_freq = 122880000,
    .pll2_freq = 2457600000,
    .pll1_loop_bw = 200,
    .sysref_timer_div = 2560,
    .pll1_ref_prio_ctrl = 0xB1,
    .high_performance_mode_clock_dist_en = true,
    .high_performance_mode_pll_vco_en = true,
    .sync_pin_mode = 0x1,
    .pulse_gen_mode = 0x07,
    .in_buf_mode = {0x00, 0x00, 0x00, 0x07, 0x03},
    .gpi_ctrl = {0x00, 0x00, 0x00, 0x11},
    .gpo_ctrl = {0x3f, 0x0E, 0x0A, 0x09},
    .num_channels = 14, //<-- number of channels in .channels.
    .channels = chan_spec_7044
    };

  • 0
    •  Analog Employees 
    on Dec 14, 2020 10:51 AM in reply to LeoTungAnh

    I assume your hmc7044 generates some input clock(s) for hmc7043, did you check those with an oscilloscope, are they ok ?

  • yep, the output of hmc7044 for hmc7043 is correct with clock of 1228800000Hz

  • 0
    •  Analog Employees 
    on Dec 14, 2020 1:59 PM in reply to LeoTungAnh

    The way I would approach this at this point (I don't see any obvious error) is write a whole register map read function on both platforms (linux/no-OS) and compare the results. It could read something like:

    reg      value

    0x00:  0x12

    0x01: 0x34

    ...

    Given the same configurations they should be identical (minus maybe some status registers). 

    I remember having done that comparison for hmc7044 between linux and no-os and they gave identical results in my tests. But maybe there were changes in the meantime.

    Use debugfs on linux to access registers and write a bash script to iterate the whole register map.

    On no-OS just use hmc7044_read() in a loop and compare them with Meld or tool of your choice.

  • 0
    •  Analog Employees 
    on Dec 14, 2020 2:03 PM in reply to LeoTungAnh

    regmap_example.zip

    Just found this diff in a local branch, you may use it as an example on no-OS.

  • 0
    •  Analog Employees 
    on Jan 21, 2021 7:50 AM in reply to LeoTungAnh

    Hi ,

    Did you try the regmap diff ? Were there any differences ?

  • Hi buda,

    My issue is from the hardware team. They missed out SDA pin from MCU to HMC7043. Now everything works well

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