ADC/DAC sampling frequency kcu105 and daq2

i was able to run the evaluation board and i have being working on understanding the code and configuration. i was able to run the fmcdaq2 on 1000 MSPS and i was able to see a output signal in iio oscilloscope. but i can not able to run the 600 MSPS. 

   

AT 600 MSPS.

i have few questions can i change the adc bit values ? and what is the maximum (adc-device-clk.channel divider) value ? can i use 40 MSPS adc for example what is the minimum sampling frequency ?

thank you.

ahmed

Parents
  • 0
    •  Analog Employees 
    on Oct 19, 2020 8:43 AM 4 months ago

    Hi Ahmed,

    The minimum supported sampling rate should be 500MSPS.

    If you want a lower sampling rate, you could implement a core that decimates the samples in the software or HDL.

    If you want to run at 600 or 500 MSPS there are two options:

    1. Keep the HDL that you are using at the moment and do ONLY a cherry pick on the no-os repo:

    git cherry-pick 7980ad177a0d15849116d01417318c1730bf82f7

    And rebuild the no-os project

    2.  Build the HDL from the master branch, do a pull on the no-os repo, and rebuild the no-os project with the new hdl.

    Also, what do you mean by changing the adc bit values?

    Sergiu

  • hi sergiu

    in the first time  i ran no-OS i was able to run case 1 and 2 without any problem but now none of them works now i am getting this error i am so confused .

    what i am trying to do is to  just use the ADC and manipulate the configuration  for example (sampling bit size =   ad9680 (14-bit ) and sampling frequency  i am looking for a sampling frequency of 35 MSPS. 

    can i do that changing in the  channel.divider line in fmcdaq2.c 

      

    one more question can i save the ADC output "sampled data " to a file on my laptop ?

    ahmed.

  • 0
    •  Analog Employees 
    on Jan 14, 2021 1:13 PM 1 month ago in reply to D0AHMED11

    Try increasing the adc_fifo_address_width one by one,  the value 22 is too high and the FPGA does not have enough memory resources. Each increment in the value will double the size of the fifo. 

    try setting the adc_fifo_address_width  to 17 first and maybe decrease the dac_fifo_address_width if you don't use the DAC fifo. 

    Laszlo

  • HI LASZLO

    ADC sample frequency = 300MSPS.

    I did what you suggested : 

    1. changed adc_fifo_address_width to 18  from 16
    2. changed dac_fifo_address_width 13 from 15.

    the results :

    • I was able to capture up to 524288 sample(1.74 ms) in iio oscilloscope. 
    • I checked the project resources and I found out that I am using 98% of BRAM.

    Questions:

    • how can I save more sampled data(100ms or 1s)? because probably if I increase the adc_fifo_address_width to more than 18 the system resources will not be enough. Even if I decreased dac_fifo_address_width.

    regards 

    Ahmed

  • 0
    •  Analog Employees 
    on Jan 15, 2021 3:34 PM 1 month ago in reply to D0AHMED11

    With that sample rate you can remove the adc_fifo block and stream the data directly to the DDR. 

    remove axi_ad9680_fifo

    reconfigure  axi_ad9680_dma to use FIFO interface on 128 bits  instead of AXIS

    connect axi_ad9680_cpack to axi_ad9680_dma

    connect util_daq2_xcvr_rx_out_clk_0  to axi_ad9680_dma/fifo_wr_clk

    connect sys_mem_clk to axi_ad9680_dma/m_dest_axi_aclk

    update axi_ad9680_dma destination memory map interface width to 512, maximum bytes per burst to 4096

    Laszlo

  • hello Laszlo

    I did the changes you suggested:

    • I removed the FIFO connect c_pack FIFO output to the dma input using FIFO interface.
      connected the clocks u mentioned. while keeping all the other clocks connected to the same source axi_ddr_cntrl/c0_ddr4_ui_clk unless its connected to different source.


    the result:

    • the sampled data capture limitation is increased up to 1048576 SPS on default (dma transfer length register width = 24), so I tried to increase it to 25 to get more sampled data at least 2097152  SPS  but the limitation of iio capture is still 1048576 SPS.
    • if I wrote any number more than 1048576 SPS in the iio oscilloscope sample text bar it will default back to the same number 1048576 SPS.

    Question:

    • how can over come this limitation because I think its not a hardware limitation ?

    Ahmed

  • 0
    •  Analog Employees 
    on Jan 20, 2021 7:14 AM 1 month ago in reply to D0AHMED11

    Hi,

    Regading the 1048576 limitation in iio-oscilloscope, I can confirm that the limitation is of a software nature:

    https://github.com/analogdevicesinc/iio-oscilloscope/blob/master/osc.h#L43

    You could try to tweak the MAX_SAMPLES value and rebuild iio-oscilloscope.

    -Dan

  • hi Dan 

    I am using the windows iio-oscilloscope program.

    how can I modify the windows version?

    Ahmed

  • 0
    •  Analog Employees 
    on Jan 20, 2021 9:40 AM 1 month ago in reply to D0AHMED11

    A simple way is to fork https://github.com/analogdevicesinc/iio-oscilloscope into your personal space. Then login to Appveyor(https://ci.appveyor.com/) using your github account.

    Then modify the MAX_SAMPLES value, create commit and push it upstream to iio-osc that you forked and appveyor should create a windows build for you.

    -Dan

  • hi Dan  

    thank you so much 

    I was able to change capture more data and save as .VSA file I facing some problem saving as .CSV and .MAT, it just does not save the whole data. but I am okay with that.

    trying to transmit this amount of data will let will take so long I did some estimation on the amount of time it will take to save 1s of sampled data which is 18.5 hours just to capture this amount. 

    I believe it is because microblaze uses USB2.0 which is 480 megabits per second, the samples transfer should be much more faster.

    Questions:

    1. can I save the sampled data without using iio-oscilloscope just directly take it from the memory as binary data? for example save the first 10000000 samples from the mem and extract the frequency content.
    2. how speed up the data transfer because I will need much more than 1s of data?   

    thanks again 

    Ahmed

  • 0
    •  Analog Employees 
    on Jan 25, 2021 5:41 PM 30 days ago in reply to D0AHMED11

    Regarding qustion:

    1. There's an utility in libiio, called iio_readdev that can read from an iio device and save it to a file. You should check that out (https://github.com/analogdevicesinc/libiio/blob/master/tests/iio_readdev.c). If you're using iio-oscilloscope on Windows, changes are that iio_readdev executable is available in the directory where osc is installed.

    2. Not sure. You could try transferring data over Network (wired connection) but I'm not sure if it will be faster.

    -Dan

  • Hi Dan

    I see what you mean I am still working your suggestion, mean while I was able to dump the data in the ADC_DDR_BASEADDR using dump/restore data file SDK utility that allowed me to transmit 17000000 byte of data in less than a minute this contain hex file data but the thing is that I am trying to make sense of the data to work on it in MATLAB. 

    Question:

    • do you think this way will allow me to send more than 1 second of data without any problem and work on it ? 
    • regarding your suggestion I was able to access the  iio_readdev , iio_info my board accepts libiio clients connections through the serial backend, so when iio_info through cmd it says :
    •  Library version: 0.21 (git tag: 565bf68)
      Compiled with backends: xml ip usb serial
      Unable to create Local IIO context : Function not implemented
      No IIO context found.

    Ahmed

Reply
  • Hi Dan

    I see what you mean I am still working your suggestion, mean while I was able to dump the data in the ADC_DDR_BASEADDR using dump/restore data file SDK utility that allowed me to transmit 17000000 byte of data in less than a minute this contain hex file data but the thing is that I am trying to make sense of the data to work on it in MATLAB. 

    Question:

    • do you think this way will allow me to send more than 1 second of data without any problem and work on it ? 
    • regarding your suggestion I was able to access the  iio_readdev , iio_info my board accepts libiio clients connections through the serial backend, so when iio_info through cmd it says :
    •  Library version: 0.21 (git tag: 565bf68)
      Compiled with backends: xml ip usb serial
      Unable to create Local IIO context : Function not implemented
      No IIO context found.

    Ahmed

Children
  • 0
    •  Analog Employees 
    on Jan 27, 2021 7:35 AM 28 days ago in reply to D0AHMED11

    Baud rate is: 115200

    https://github.com/analogdevicesinc/no-OS/blob/03770a5cf98f496dfe6c6a3d6cbf8423e09ef282/projects/fmcadc2/src/app/app_iio.c#L105

    Make sure you connect to the right serial port by running:

    'dmesg -w'

    Disconnect and reconnect the USB UART cable from the board.

    Run the command like this:

    'iio_info -u serial:COM2,115200'

  • thanks alot Cristian

    I was able send data using iio_readdev but it is so slow still just like iio_oscilloscope capture trying to send 1048576 sample takes 4 minutes that so much for just this amount of data. 

    I was able to dump the data in the ADC_DDR_BASEADDR using dump/restore data file SDK utility that allowed me to transmit 17000000 byte of data in less than a minute this contain hex file data but the thing is that I am trying to make sense of the data to work on it in MATLAB. 

    Question:

    • do you think this way (dumping data to file ) will allow me to send more than 1 second very fast without any problem and work on it ? 

    Ahmed

  • 0
    •  Analog Employees 
    on Jan 27, 2021 12:07 PM 28 days ago in reply to D0AHMED11

    You could try capturing data with this script(it saves a .csv file):

    https://github.com/analogdevicesinc/no-OS/blob/master/scripts/xilinx_capture.tcl

    Here is how I run the script: 

    source /opt/Xilinx/SDK/2018.2/settings64.sh

    xsdb ../../scripts/xilinx_capture.tcl ZYNQ_PS7 0x800000 1000 1 16

    This script can only read data.

  • I did some changes  in the HDL by changing the adc_cpack to 1 channel instead of 2 and I ran the no-OS  code in sdk with only 1 adc channle enabled.

    ERROR:

    when i try to dump the data  from ADC_DDR_BASEADDR with a size more than 100000 byte = 50000 sample (2byte per sample). any more data and it will stuck on this 3333 value until the end. so the DDR will be filled with data until a specific address what left it is gonna be 3333.

    if I used iio_oscillscope much more than 50000 sample is going to be saved. 

    Questions:

    How can I use data dumping method because its faster to sample much more data instead of just getting stuck in saving the same value ?

    Ahmed  

  • 0
    •  Analog Employees 
    on Jan 29, 2021 1:47 PM 26 days ago in reply to D0AHMED11

    You shold probably make successive smaller captures and increment the location where the data is saved, to obtain a continuous stream of data.

    Probably you will have to use interrupts, similar to this:

    https://github.com/analogdevicesinc/no-OS/commit/c74747c699f0eb6380db840ac34f9fc3dba5ffbf

    https://github.com/analogdevicesinc/no-OS/commit/5eb036fb22a514ccba36efaefa15dac8068a6a74

    Then save the datas with xilinx_capture.tcl.

    Cristian

  • hi Cristian 

    when I ran the script I faced this error :

    and this :

    thanks

  • 0
    •  Analog Employees 
    on Feb 4, 2021 6:05 AM 20 days ago in reply to D0AHMED11

    Hi Ahmed,

    You should run the commands in cmd:

    And same for the .tcl script 

    Not from inside xstb or vivado

    Regards,

    Mihail

  • hello 

    I was able to run a xilinx_capture.tcl and saved my data to a file but transmitting the data is still so slow.

    Questions:

    1. how can I transmit data faster over no-OS?
    2. I set the adc and dac to 300MSPS over by doing these changes:

    case '4':
    printf ("4 - ADC 300 MSPS; DAC 300 MSPS\n");
    p_ad9523_param->pll2_vco_diff_m1 = 5;
    (&p_ad9523_param->channels[DAC_FPGA_CLK])->
    channel_divider = 4;
    (&p_ad9523_param->channels[DAC_DEVICE_CLK])->
    channel_divider = 2;
    (&p_ad9523_param->channels[DAC_DEVICE_SYSREF])->
    channel_divider = 256;
    (&p_ad9523_param->channels[DAC_FPGA_SYSREF])->
    channel_divider = 256;
    (&p_ad9523_param->channels[ADC_FPGA_CLK])->
    channel_divider = 4;
    (&p_ad9523_param->channels[ADC_DEVICE_CLK])->
    channel_divider = 2;
    (&p_ad9523_param->channels[ADC_DEVICE_SYSREF])->
    channel_divider = 256;
    (&p_ad9523_param->channels[ADC_FPGA_SYSREF])->
    channel_divider = 256;
    p_ad9144_param->lane_rate_kbps = 3000000;
    ad9144_xcvr_param->lane_rate_khz = 3000000;

    ad9144_xcvr_param->ref_rate_khz = 150000;

    p_ad9680_param->lane_rate_kbps = 3000000;
    ad9680_xcvr_param->lane_rate_khz = 3000000;

    ad9680_xcvr_param->ref_rate_khz = 150000;

    #ifndef ALTERA_PLATFORM
    ad9144_xcvr_param->lpm_enable = 1;
    ad9144_xcvr_param->cpll_enable = 1;
    ad9144_xcvr_param->out_clk_sel = 4;

    ad9680_xcvr_param->lpm_enable = 1;
    ad9680_xcvr_param->cpll_enable = 1;
    ad9680_xcvr_param->out_clk_sel = 4;
    #endif

    I did some changes in #struct adxcvr_init ad9144_xcvr_param function

    .sys_clk_sel = 0  ///from 3;

    .cpll_enable = 1 //from 0;

    • THE OUTPUT I GET IS SO NOISY I BEILEVE ALSO THIS ERROR SHOW UP BUT IT DOES NOT STOP THE SIMULATION I AM WONDERING IF IT HAS ANYTHING TO DO WITH IT ?

    4 - ADC 300 MSPS; DAC 300 MSPS
    error: ad9144_xcvr: adxcvr_clk_enable() failed //DOES THIS EFFECT ?
    ad9680_xcvr: OK (3000000 kHz)
    ad9680_jesd status:
    Link is enabled
    Measured Link Clock: 74.998 MHz
    Reported Link Clock: 75.000 MHz
    Lane rate: 3000.000 MHz
    Lane rate / 40: 75.000 MHz
    LMFC rate: 9.375 MHz
    Link status: DATA
    SYSREF captured: Yes
    SYSREF alignment error: No
    ad9144_jesd status:
    Link is enabled
    Measured Link Clock: 74.998 MHz
    Reported Link Clock: 75.000 MHz
    Lane rate: 3000.000 MHz
    Lane rate / 40: 75.000 MHz
    LMFC rate: 9.375 MHz
    SYNC~: deasserted
    Link status: DATA
    SYSREF captured: Yes
    SYSREF alignment error: No
    ad9680_adc: Successfully initialized (300000000 Hz)
    ad9144_dac: Successfully initialized (300000000 Hz)
    daq2: setup and configuration is done
    The board accepts libiio clients connections through the serial backend.

    THANKS