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AD9467 KC705 Reference design

Thread Summary

The user is troubleshooting the AD9467 FMC reference design on the KC705 FPGA board, experiencing inconsistent test results and incorrect waveforms when dumping data from DDR3. The final answer confirms the need for an external clock and suggests that the input is AC-coupled, not suitable for square waves. The user should connect a 10 MHz sine wave clock and consider modifying the analog input coupling to DC if necessary.
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hi all,

I use the AD9467 default FMC reference design on KC705(https://wiki.analog.com/resources/fpga/xilinx/fmc/ad9467#more_information).
However I face many problems while executing ad9467_fmc_ebz.c:
1. I have no idea whether the software project build successfully.

   There is the project contents and build settings.
project contents 


2. Sometimes I get "Test passed", and sometimes I get ERRORs.


3. How can I read the data in ddr3?
I have tried to dump file by Xilinx>Dump/Restor Data File and setting Start Address = 0, Size = 8192,
The data I dumped isn't correct (The input signal is 1 Vpp , 1.2Vdc ,1MHz sine wave)

Could any body give me some advices.
Thanks,
Wei-Chieh