AD9467 KC705 Reference design

Today, I tried dump file by Xilinx>Dump/Restor Data File and setting Start Address = 0x80800000, Size = 16384,
And the dump data is processed by data = data(1:2:end) + data(2:2:end) * 256;
Then I get the following,

<1MHz Sine, 2-Vpp>                                                                                  <1MHz Square, 2-Vpp>   

However, the wave form is weird.

Today, I tried dump file by Xilinx>Dump/Restor Data File and setting Start Address = 0x80800000, Size = 16384,
And the dump data is processed by data = data(1:2:end) + data(2:2:end) * 256;
Then I get the following,

<1MHz Sine, 2-Vpp>                                                                                  <1MHz Square, 2-Vpp>   

However, the wave form is weird.

Question moved to Microcontroller no-OS Drivers forum.
Someone here can help you out with the capture scrips(moving data from DDR to computer).

Regarding the captured wave forms. In the above images you posted, In the left one your format is wrong, Try printing the data in two's complement not binary offset.
Regarding the right image, there should be some filters on the evaluation board before the AD9467. As I can see in your captured waveform the input is AC coupled not DC, meaning your signal will look more like waveform on charging/discharging capacitor. Are you using the AIN input on the evaluation board?

Andrei

Hi Andrei,

I use AIN input on evaluation.

I am not sure how the data store in DDR3. I suggest the 16-bit datas are stored as the following structure:

Addr |               dma.transfer->start_address            |          dma.transfer->start_address + 1             |
Data |    D[15] D[13] D[11] D[9] D[7] D[5] D[3] D[1]   |    D[14] D[12] D[10] D[8] D[6] D[4] D[2] D[0]    | 

I tried to print data in two's complement and finally I get the following wave form:

<1MHz Sine, 2-Vpp>                                                                          

<1MHz Square, 2-Vpp>

Both the waveform looks weird,

Thanks

Wei-Chieh