I have the entire reference design working though, I want to implement only the ADC and want to elude the DAC from the design. Could you please stress on how could I apply the arbitrary signal and observe the samples? I have my DAC output on the GPIO. I have been working on ZC706 and FMCDAQ2. The link which I have been following for the software design is github.com/.../fmcdaq2.c
yes, thank you so much
Not sure if I 100% understand your question, maybe you could rephrase, but wouldn't a signal generator connected to the 2 RX channels work to validate the RX/ADC path if you don't want to use the DAC ?
Also, in order to observe the samples, you could launch the code with the DAC_DMA_EXAMPLE defined, connect the signal generator to the RX with SMA coaxial cable, and use the following command to retrieve 16384 samples from the RX memory:
xsct scripts/xilinx_capture.tcl ZYNQ_PS7 0x800000 65536 4 16
This will create some .csv files with samples that you can plot.
If this works ok, remove any DAC related code from the project and you're good to go.
I have looked for DAC_DMA_EXAMPLE. The commands which you have mentioned are for Linux, isn't it? Could you please tell me how do I do it on windows?
I would add the Xilinx SDK folder containing the executable `xsct` to the Windows Path so that you can use the command I posted above as-is. See link below if you don't know how to add to path. On Windows it should be something like (adjust if needed):
Once you add it to the path you may execute that xsct command above to retreive samples from memory.
Thank you and sorry for this. I tried doing it this way and I end with this error. I have tried following these links https://www.xilinx.com/html_docs/xilinx2019_1/SDK_Doc/xsct/intro/xsct_install_launch_windows.html
However, when I run the xilinx_capture.tcl I get this.
xsct% source C:/Documents/adc/hdl/no-OS-2019_R1/scripts/xilinx_capture.tclattempting to launch hw_server****** Xilinx hw_server v2019.1 **** Build date : May 24 2019 at 15:13:31 ** Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.INFO: hw_server application startedINFO: Use Ctrl-C to exit hw_server application****** Xilinx hw_server v2019.1 **** Build date : May 24 2019 at 15:13:31 ** Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.INFO: hw_server application startedINFO: Use Ctrl-C to exit hw_server applicationINFO: To connect to this hw_server instance use url: TCP:127.0.0.1:3121Read parameters from memorymissing operator at _@_in expression " - 0x02 _@_1"xsct% Info: ARM Cortex-A9 MPCore #1 (target 3) Stopped at 0xffffff34 (Suspended)
Then I tried adding the address and I end up with another error
xsct% source C:/Documents/adc/hdl/no-OS-2019_R1/scripts/xilinx_capture.tcl 0x800000 65536 4 16wrong # args: should be "source ?-encoding name? fileName"
Can you please tell me where am I going wrong?
You are running the script without arguments from the xsct console:
prashin said:xsct% source C:/Users/psh1brg/Documents/adc/hdl/no-OS-2019_R1/scripts/xilinx_capture.tcl
Please run it as I said, from the windows cmd shell:
C:\PATH\TO\YOUR\xsct.bat C:\Users\psh1brg\Documents\adc\hdl\no-OS-2019_R1\scripts\xilinx_capture.tcl ZYNQ_PS7 0x800000 65536 4 16
Let me know if this helps
yes, I could. Thank you so very much for the help. I have four .csv files. Now, how do I interpret the signals with which I mean to say how do I compare it with the input signal?
These are standard .csv files representing RX channels. You may use any tool like MS Excel / Libreoffice Calc to plot the data and visualize it and compare with what you are sending on the TX. You could also use Python / Matlab to do more fancy stuff like FFT.
But this is already application level discussion and you should know best what data you are sending and how you want to analyze it on the RX side.
And please mark one of the answers as Verified Answer, it seems to me that you were able to get ADC samples via the script to your computer. If you have further questions which are not on the same topic feel free to open another thread.
Thank you for your reply. However, I am verifying the reference design as given on your website. To adapt the reference design to our application, I had to know how do you verify the ADC outputs with the DAC samples?
I very well know that the DAC has the sine values in the lut which is being generated whereas how do you know the values obtained on the .csv values correspond to the DAC input of the FMCDAQ2 board?
Sorry, for repeatedly asking and forgive me if the question sounds silly. It would be beneficial if you guide me on this.
Thank you in advance,
One way to verify the data is to connect a loopback wire from TX to RX. Then do a visual and numerical comparison of the TX and RX data.