Unable to build no-OS on windows

Hello all,

I am trying to build the no-OS daq2 project on windows. From this link:  https://github.com/analogdevicesinc/no-OS/wiki/Building-no-OS-on-Windows

Sorry for the stupid question, I wanted to know is there a way to make the project on the tcl console instead of the command shell?

How do I check GNU make? and how can I build it manually?

Could you please help me with this!

Thanking you,

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  • +1
    •  Analog Employees 
    on Feb 27, 2020 3:06 PM over 1 year ago

    Hello,

    The build guide https://github.com/analogdevicesinc/no-OS/wiki/Building-no-OS-on-Windows is avaliable only for the projects that are found in the `/projects` folder.

    The daq2 project is currently in progress of being updated. You can see an initial updated version with PR: https://github.com/analogdevicesinc/no-OS/pull/500

    I still suggest using the stable version from root folder until it is merged to master.

    Regards,

    Antoniu

  • Thank you for the reply. Yes, I am using the stable version of no-OS. I have been trying to build no-OS on windows. When I build it, I get these errors:

    Description Resource Path Location Type
    fatal error: platform_drivers.h: No such file or directory fmcdaq2.c /sw/src line 47 C/C++ Problem

    Description Resource Path Location Type
    make: *** [src/subdir.mk:23: src/fmcdaq2.o] Error 1 sw C/C++ Problem

    Description Resource Path Location Type
    make: *** No rule to make target '../../../no-OS/scripts/zynq_ps7.mk'. Stop. zc706 C/C++ Problem

    I have checked these trying googling out. I haven't found any answer or probably, I have missed something. Can you please help me with this.

    How can I successfully build the project?

  • Hi,

     I have uncommented the lines in the config.h file

    #define XILINX

    #define ZYNQ

    Inspite of doing that I am still with the errors

    Can you please help me to resolve this error?

  • 0
    •  Analog Employees 
    on Mar 4, 2020 12:00 PM 11 months ago in reply to prashin

    Hello,

    You don't need to add extra code (defines).

    You have to uncomment for zc706:

    #define XILINX

    #define ZYNQ

    and the familiy definition, as stated in the comment for the config.h file.

    In your case: #define ZYNQ_PS7

    If you are un 2019_r1 branch, please use only platform_drivers.c, platform_drivers.h from /common_drivers.

    Without `spi.h`, `gpio.h` etc. Even though these are included in ad9144.c, ad9680.c, for this project setup just replace them with `include "platform_drivers.h"

    Let me know if you have any other issues.

    Regards,

    Antoniu

  • I uncommented those lines as you said in the config file.

    I replaced the the delay.h, spi.h in the ad9144.h and ad9680.h with platform_drivers.h. But still the error persists.

    Sorry, but I did not find the gpio.h in any of the .h/.c files of ad9144/ad9680.

    I am still with the error in the config file. Please find the attachment.

    It is been showing error for the line which has nothing.

    Thank you and regards

  • 0
    •  Analog Employees 
    on Mar 4, 2020 2:02 PM 11 months ago in reply to prashin

    That's really strange. Can you please clean your project and eventually create a new one based on the latest discussions?

    Also, I don't think you need Communication.c and Communication.h files, nor axi_io.c, axi_io.h.

    If you use ZC706, you don't need `altera` drivers.

    Just use main file `fmcdaq2.c`, `config.h` from `fmcdaq2` folder, drivers (ad9144.c ad9144.h, ad9523.c, ad9523.h ad9680.c, ad9680.h) and the drivers from `common_drivers`(platform_drivers + axi drivers - adc_core, dac_core, etc).

    I suggest adding first the fmcdaq2.c + config file and based on the required includes add step by step the files from the 2019_r1 release branch.

    Regards,

    Antoniu

  • Hi,

    I tried doing it.I ended up with errors  which were like multiple declaration of xilinx_xcvr_drp_read, etc with which I had to comment some of the loops in xcvr_core.c, xilinx_transceiver.c, etc.

    I could program the fpga and run the configuration, I get an output as shown below on the SDK terminal.

    Available sampling rates:
        1 - ADC 1000 MSPS; DAC 1000 MSPS
        2 - ADC  500 MSPS; DAC 1000 MSPS
        3 - ADC  500 MSPS; DAC  500 MSPS
        4 - ADC  600 MSPS; DAC  600 MSPS
        5 - ADC 1000 MSPS; DAC 2000 MSPS (2x interpolation)
    choose an option [default 1]:
    2 - ADC  500 MSPS; DAC 1000 MSPS

    QPLL ENABLE

    CPLL ENABLE
    xcvr_setup: Failed to set line rate!Desired rate: 5000000, obtained rate: 0
    Tx link is enabled
    Measured Link Clock: 250 MHz
    Link status: DATA
    SYSREF captured: Yes
    Rx link is enabled
    Measured Link Clock: 250 MHz
    Link status: CGS
    SYSREF captured: Yes
    adc_setup adc core initialized (1000 MHz).

    Whereas, I am unable to view the sine wave on the oscilloscope.Could you please tell how am I suppose to view the sine wave as I want to know if I have followed the right procedure?

    Thank you & regards

  • 0
    •  Analog Employees 
    on Mar 5, 2020 10:24 AM 11 months ago in reply to prashin

    Hello,

    You should not get any errors like multiple declarations of specific function (and you should not comment code blocks in the drivers implementations(. Can you please share the entire src folder that you are using?

    Also, it seems that the phy layer is failing (xcvr_setup).

    Regards,

    Antoniu

  • Hi

    Yes, please find the attachment. Can I please know how do I attach the folder? I only have the provision of file upload.

    The error it shows is in the axi_adxcvr.c, xilinx_transceiver.c, xilinx_xcvr_channel.c, etc files.

    Can you please tell how do I resolve these errors?

    Thank you & regards,

  • 0
    •  Analog Employees 
    on Mar 5, 2020 11:47 AM 11 months ago in reply to prashin

    Please remove axi_adxcvr.c axi_adxcvr.h, delay.h and error.h

    And make sure you haven't done any other modifications to the implemented functions (like commenting loops, etc.)

    Regards,

    Antoniu

  • 0
    •  Analog Employees 
    on Mar 6, 2020 8:40 AM 11 months ago in reply to amiclaus

    Hello,

    I am coming with an update: you can use now the project version available with https://github.com/analogdevicesinc/no-OS/pull/500

    It should work with ZC706

    All the source files you need are specified in README found in the projects folder.

    Looking forward to your feedback,

    Antoniu

  • Hi,

    Based on your last reply, I removed the axi_adxcvr.c axi_adxcvr.h, delay.h and error.h files and the project was built successfully. I programmed ZC706 and when I launch on the debugger, I get this output on the putty as follows.

    Available sampling rates:
            1 - ADC 1000 MSPS; DAC 1000 MSPS
            2 - ADC  500 MSPS; DAC 1000 MSPS
            3 - ADC  500 MSPS; DAC  500 MSPS
            4 - ADC  600 MSPS; DAC  600 MSPS
            5 - ADC 1000 MSPS; DAC 2000 MSPS (2x interpolation)
    choose an option [default 1]:
    2 - ADC  500 MSPS; DAC 1000 MSPS

    QPLL ENABLE

    CPLL ENABLE
    Tx link is enabled
                      Measured Link Clock: 250 MHz
                                                  Link status: DATA
                                                                   SYSREF captured: Yes
       Rx link is enabled
                         Measured Link Clock: 125 MHz
                                                     Link status: DATA
                                                                      SYSREF captured: Yes
          adc_setup adc core initialized (500 MHz).

    I am unable to see the output sine waveform on the oscilloscope. How am I suppose to do that? Is there anything which I am missing?

    Thank you & regards

Reply
  • Hi,

    Based on your last reply, I removed the axi_adxcvr.c axi_adxcvr.h, delay.h and error.h files and the project was built successfully. I programmed ZC706 and when I launch on the debugger, I get this output on the putty as follows.

    Available sampling rates:
            1 - ADC 1000 MSPS; DAC 1000 MSPS
            2 - ADC  500 MSPS; DAC 1000 MSPS
            3 - ADC  500 MSPS; DAC  500 MSPS
            4 - ADC  600 MSPS; DAC  600 MSPS
            5 - ADC 1000 MSPS; DAC 2000 MSPS (2x interpolation)
    choose an option [default 1]:
    2 - ADC  500 MSPS; DAC 1000 MSPS

    QPLL ENABLE

    CPLL ENABLE
    Tx link is enabled
                      Measured Link Clock: 250 MHz
                                                  Link status: DATA
                                                                   SYSREF captured: Yes
       Rx link is enabled
                         Measured Link Clock: 125 MHz
                                                     Link status: DATA
                                                                      SYSREF captured: Yes
          adc_setup adc core initialized (500 MHz).

    I am unable to see the output sine waveform on the oscilloscope. How am I suppose to do that? Is there anything which I am missing?

    Thank you & regards

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