Tool/software: Code Composer Studio
Experience Level: Beginner
Trying to establish communication between ADC and controller via SPI.
I want to read the conversion result. The default SPI library is not available in the Tiva peripheral library, therefore I had to modify it in this way. Any leads would be very helpful.
#include <stdbool.h>
#include <stdint.h>
#include "inc/hw_memmap.h"
#include "driverlib/gpio.h"
#include "driverlib/pin_map.h"
#include "driverlib/ssi.h"
#include "driverlib/sysctl.h"
#include "driverlib/uart.h"
#include "utils/uartstdio.h"
#include "inc/hw_types.h"
#include "inc/hw_ints.h"
#include "driverlib/adc.h"
#include "driverlib/interrupt.h"
#include "driverlib/rom.h"
#include "driverlib/rom_map.h"
#include "driverlib/fpu.h"
#include "driverlib/debug.h"
#include "driverlib/gpio.h"
#include "drivers/pinout.h"
//#include "ad717x/ad717x.h"
/* AD717X Register Map */
#define AD717X_COMM_REG 0x00
#define AD717X_STATUS_REG 0x00
#define AD717X_ADCMODE_REG 0x01
#define AD717X_IFMODE_REG 0x02
#define AD717X_REGCHECK_REG 0x03
#define AD717X_DATA_REG 0x04
#define AD717X_GPIOCON_REG 0x06
#define AD717X_ID_REG 0x07
#define AD717X_CHMAP0_REG 0x10
#define AD717X_CHMAP1_REG 0x11
#define AD717X_CHMAP2_REG 0x12
#define AD717X_CHMAP3_REG 0x13
#define AD717X_CHMAP4_REG 0x14
#define AD717X_CHMAP5_REG 0x15
#define AD717X_CHMAP6_REG 0x16
#define AD717X_CHMAP7_REG 0x17
#define AD717X_CHMAP8_REG 0x18
#define AD717X_CHMAP9_REG 0x19
#define AD717X_CHMAP10_REG 0x1A
#define AD717X_CHMAP11_REG 0x1B
#define AD717X_CHMAP12_REG 0x1C
#define AD717X_CHMAP13_REG 0x1D
#define AD717X_CHMAP14_REG 0x1E
#define AD717X_CHMAP15_REG 0x1F
#define AD717X_SETUPCON0_REG 0x20
#define AD717X_SETUPCON1_REG 0x21
#define AD717X_SETUPCON2_REG 0x22
#define AD717X_SETUPCON3_REG 0x23
#define AD717X_SETUPCON4_REG 0x24
#define AD717X_SETUPCON5_REG 0x25
#define AD717X_SETUPCON6_REG 0x26
#define AD717X_SETUPCON7_REG 0x27
#define AD717X_FILTCON0_REG 0x28
#define AD717X_FILTCON1_REG 0x29
#define AD717X_FILTCON2_REG 0x2A
#define AD717X_FILTCON3_REG 0x2B
#define AD717X_FILTCON4_REG 0x2C
#define AD717X_FILTCON5_REG 0x2D
#define AD717X_FILTCON6_REG 0x2E
#define AD717X_FILTCON7_REG 0x2F
#define AD717X_OFFSET0_REG 0x30
#define AD717X_OFFSET1_REG 0x31
#define AD717X_OFFSET2_REG 0x32
#define AD717X_OFFSET3_REG 0x33
#define AD717X_OFFSET4_REG 0x34
#define AD717X_OFFSET5_REG 0x35
#define AD717X_OFFSET6_REG 0x36
#define AD717X_OFFSET7_REG 0x37
#define AD717X_GAIN0_REG 0x38
#define AD717X_GAIN1_REG 0x39
#define AD717X_GAIN2_REG 0x3A
#define AD717X_GAIN3_REG 0x3B
#define AD717X_GAIN4_REG 0x3C
#define AD717X_GAIN5_REG 0x3D
#define AD717X_GAIN6_REG 0x3E
#define AD717X_GAIN7_REG 0x3F
/* Communication Register bits */
#define AD717X_COMM_REG_WEN (0 << 7)
#define AD717X_COMM_REG_WR (0 << 6)
#define AD717X_COMM_REG_RD (1 << 6)
#define AD717X_COMM_REG_RA(x) ((x) & 0x3F)
/* Status Register bits */
#define AD717X_STATUS_REG_RDY (1 << 7)
#define AD717X_STATUS_REG_ADC_ERR (1 << 6)
#define AD717X_STATUS_REG_CRC_ERR (1 << 5)
#define AD717X_STATUS_REG_REG_ERR (1 << 4)
#define AD717X_STATUS_REG_CH(x) ((x) & 0x0F)
/* ADC Mode Register bits */
#define AD717X_ADCMODE_REG_REF_EN (1 << 15)
#define AD717X_ADCMODE_SING_CYC (1 << 13)
#define AD717X_ADCMODE_REG_DELAY(x) (((x) & 0x7) << 8)
#define AD717X_ADCMODE_REG_MODE(x) (((x) & 0x7) << 4)
#define AD717X_ADCMODE_REG_CLKSEL(x) (((x) & 0x3) << 2)
/* ADC Mode Register additional bits for AD7172-2, AD7172-4, AD4111 and AD4112 */
#define AD717X_ADCMODE_REG_HIDE_DELAY (1 << 14)
/* Interface Mode Register bits */
#define AD717X_IFMODE_REG_ALT_SYNC (1 << 12)
#define AD717X_IFMODE_REG_IOSTRENGTH (1 << 11)
#define AD717X_IFMODE_REG_HIDE_DELAY (1 << 10)
#define AD717X_IFMODE_REG_DOUT_RESET (1 << 8)
#define AD717X_IFMODE_REG_CONT_READ (1 << 7)
#define AD717X_IFMODE_REG_DATA_STAT (1 << 6)
#define AD717X_IFMODE_REG_REG_CHECK (1 << 5)
#define AD717X_IFMODE_REG_XOR_EN (0x01 << 2)
#define AD717X_IFMODE_REG_CRC_EN (0x02 << 2)
#define AD717X_IFMODE_REG_XOR_STAT(x) (((x) & AD717X_IFMODE_REG_XOR_EN) == AD717X_IFMODE_REG_XOR_EN)
#define AD717X_IFMODE_REG_CRC_STAT(x) (((x) & AD717X_IFMODE_REG_CRC_EN) == AD717X_IFMODE_REG_CRC_EN)
#define AD717X_IFMODE_REG_DATA_WL16 (1 << 0)
/* GPIO Configuration Register bits */
#define AD717X_GPIOCON_REG_MUX_IO (1 << 12)
#define AD717X_GPIOCON_REG_SYNC_EN (1 << 11)
#define AD717X_GPIOCON_REG_ERR_EN(x) (((x) & 0x3) << 9)
#define AD717X_GPIOCON_REG_ERR_DAT (1 << 8)
#define AD717X_GPIOCON_REG_IP_EN1 (1 << 5)
#define AD717X_GPIOCON_REG_IP_EN0 (1 << 4)
#define AD717X_GPIOCON_REG_OP_EN1 (1 << 3)
#define AD717X_GPIOCON_REG_OP_EN0 (1 << 2)
#define AD717X_GPIOCON_REG_DATA1 (1 << 1)
#define AD717X_GPIOCON_REG_DATA0 (1 << 0)
/* GPIO Configuration Register additional bits for AD7172-4, AD7173-8 */
#define AD717X_GPIOCON_REG_GP_DATA3 (1 << 7)
#define AD717X_GPIOCON_REG_GP_DATA2 (1 << 6)
#define AD717X_GPIOCON_REG_GP_DATA1 (1 << 1)
#define AD717X_GPIOCON_REG_GP_DATA0 (1 << 0)
/* GPIO Configuration Register additional bits for AD7173-8 */
#define AD717X_GPIOCON_REG_PDSW (1 << 14)
#define AD717X_GPIOCON_REG_OP_EN2_3 (1 << 13)
/* GPIO Configuration Register additional bits for AD4111, AD4112 */
#define AD4111_GPIOCON_REG_OP_EN0_1 (1 << 13)
#define AD4111_GPIOCON_REG_DATA1 (1 << 7)
#define AD4111_GPIOCON_REG_DATA0 (1 << 6)
/* GPIO Configuration Register additional bits for AD4111 */
#define AD4111_GPIOCON_REG_OW_EN (1 << 12)
/* Channel Map Register 0-3 bits */
#define AD717X_CHMAP_REG_CH_EN (1 << 15)
#define AD717X_CHMAP_REG_SETUP_SEL(x) (((x) & 0x7) << 12)
#define AD717X_CHMAP_REG_AINPOS(x) (((x) & 0x1F) << 5)
#define AD717X_CHMAP_REG_AINNEG(x) (((x) & 0x1F) << 0)
/* Channel Map Register additional bits for AD4111, AD4112 */
#define AD4111_CHMAP_REG_INPUT(x) (((x) & 0x3FF) << 0)
/* Setup Configuration Register 0-3 bits */
#define AD717X_SETUP_CONF_REG_BI_UNIPOLAR (1 << 12)
#define AD717X_SETUP_CONF_REG_REF_SEL(x) (((x) & 0x3) << 4)
/* Setup Configuration Register additional bits for AD7173-8 */
#define AD717X_SETUP_CONF_REG_REF_BUF(x) (((x) & 0x3) << 10)
#define AD717X_SETUP_CONF_REG_AIN_BUF(x) (((x) & 0x3) << 8)
#define AD717X_SETUP_CONF_REG_BURNOUT_EN (1 << 7)
#define AD717X_SETUP_CONF_REG_BUFCHOPMAX (1 << 6)
/* Setup Configuration Register additional bits for AD7172-2, AD7172-4, AD7175-2 */
#define AD717X_SETUP_CONF_REG_REFBUF_P (1 << 11)
#define AD717X_SETUP_CONF_REG_REFBUF_N (1 << 10)
#define AD717X_SETUP_CONF_REG_AINBUF_P (1 << 9)
#define AD717X_SETUP_CONF_REG_AINBUF_N (1 << 8)
/* Setup Configuration Register additional bits for AD4111, AD4112 */
#define AD4111_SETUP_CONF_REG_REFPOS_BUF (1 << 11)
#define AD4111_SETUP_CONF_REG_REFNEG_BUF (1 << 10)
#define AD4111_SETUP_CONF_REG_AIN_BUF(x) (((x) & 0x3) << 8)
#define AD4111_SETUP_CONF_REG_BUFCHOPMAX (1 << 6)
/* Filter Configuration Register 0-3 bits */
#define AD717X_FILT_CONF_REG_SINC3_MAP (1 << 15)
#define AD717X_FILT_CONF_REG_ENHFILTEN (1 << 11)
#define AD717X_FILT_CONF_REG_ENHFILT(x) (((x) & 0x7) << 8)
#define AD717X_FILT_CONF_REG_ORDER(x) (((x) & 0x3) << 5)
#define AD717X_FILT_CONF_REG_ODR(x) (((x) & 0x1F) << 0)
/* ID register mask for relevant bits */
#define AD717X_ID_REG_MASK 0xFFF0
/* AD7172-2 ID */
#define AD7172_2_ID_REG_VALUE 0x00D0
/* AD7172-4 ID */
#define AD7172_4_ID_REG_VALUE 0x2050
/* AD7173-8 ID */
#define AD7173_8_ID_REG_VALUE 0x30D0
/* AD7175-2 ID */
#define AD7175_2_ID_REG_VALUE 0x0CD0
/* AD7175-8 ID */
#define AD7175_8_ID_REG_VALUE 0x3CD0
/* AD7176-2 ID */
#define AD7176_2_ID_REG_VALUE 0x0C90
/* AD7177-2 ID */
#define AD7177_2_ID_REG_VALUE 0x4FD0
/* AD411x ID */
#define AD411X_ID_REG_VALUE 0x30D0
/*****************************************************************************/
/******************* AD717X Constants ****************************************/
/*****************************************************************************/
#define AD717X_CRC8_POLYNOMIAL_REPRESENTATION 0x07 /* x8 + x2 + x + 1 */
/* Error codes */
#define INVALID_VAL -1 /* Invalid argument */
#define COMM_ERR -2 /* Communication error on receive */
#define TIMEOUT -3 /* A timeout has occured */
#define AD7172_2_SLAVE_ID 1
/*
#ifndef __AD717X_H__
#define __AD717X_H__
*/
typedef enum {
AD717X_DISABLE,
AD717X_USE_CRC,
AD717X_USE_XOR,
} ad717x_crc_mode;
/*! AD717X register info */
typedef struct {
int32_t addr;
int32_t value;
int32_t size;
} ad717x_st_reg;
/*
typedef enum spi_type {
ALTERA_SPI
} spi_type;
typedef struct spi_desc {
enum spi_type type;
uint32_t id;
} spi_desc;
*/
/*
* The structure describes the device and is used with the ad717x driver.
* @slave_select_id: The ID of the Slave Select to be passed to the SPI calls.
* @regs: A reference to the register list of the device that the user must
* provide when calling the Setup() function.
* @num_regs: The length of the register list.
* @userCRC: Error check type to use on SPI transfers.
*/
typedef struct {
/* SPI */
//spi_desc *spi_desc;
/* Device Settings */
ad717x_st_reg *regs;
uint8_t num_regs;
//ad717x_crc_mode useCRC;
} ad717x_dev;
/*
typedef struct spi_init_param {
enum spi_type type;
uint32_t id;
} spi_init_param;
*/
typedef struct {
/* SPI */
//spi_init_param spi_init;
/* Device Settings */
ad717x_st_reg *regs;
uint8_t num_regs;
} ad717x_init_param;
//*****************************************************************************
//
//! This code configures the SSI0 as SPI Master. The code will
//! send three characters on the master Tx then polls the receive FIFO until
//! 3 characters are received on the master Rx.
//!
//! The following peripherals and I/O signals are used. You must
//! review these and change as needed for your own board:
//! - SSI0 peripheral
//! - GPIO Port A peripheral (for SSI0 pins)
//! - SSI0Clk - PA2
//! - SSI0Fss - PA3
//! - SSI0Rx - PA4
//! - SSI0Tx - PA5
//!
//! The following UART signals are configured only for displaying console
//! messages for this example. These are not required for operation of SSI0.
//! - UART0 peripheral
//! - GPIO Port A peripheral (for UART0 pins)
//! - UART0RX - PA0
//! - UART0TX - PA1
//!
//! This example uses the following interrupt handlers. To use this example
//! in your own application you must add these interrupt handlers to your
//! vector table.
//! - None.
//
//*****************************************************************************
//*****************************************************************************
//
// Number of bytes to send and receive.
//
//*****************************************************************************
#define NUM_SSI_DATA 3
//*****************************************************************************
//
// This function sets up UART0 to be used for a console to display information
// as the example is running.
//
//*****************************************************************************
uint32_t g_ui32SysClock;
#ifdef DEBUG
void
__error__(char *pcFilename, uint32_t ui32Line)
{
}
#endif
ad717x_st_reg ad7172_2_regs[] =
{
{ AD717X_STATUS_REG, 0x00, 1 },
{ AD717X_ADCMODE_REG, 0x0000, 2 },
{
AD717X_IFMODE_REG,
AD717X_IFMODE_REG_DOUT_RESET | AD717X_IFMODE_REG_CRC_EN,
2
},
{ AD717X_REGCHECK_REG, 0x0000, 3},
{ AD717X_DATA_REG, 0x0000, 3 },
{ AD717X_GPIOCON_REG, 0x0000, 2 },
{ AD717X_ID_REG, 0x0000, 2 },
{
AD717X_CHMAP0_REG,
AD717X_CHMAP_REG_CH_EN | AD717X_CHMAP_REG_AINNEG(2),
2
},
{ AD717X_CHMAP1_REG, 0x0000, 2 },
{ AD717X_CHMAP2_REG, 0x0000, 2 },
{ AD717X_CHMAP3_REG, 0x0000, 2 },
{ AD717X_SETUPCON0_REG, 0x0000, 2 },
{ AD717X_SETUPCON1_REG, 0x0000, 2 },
{ AD717X_SETUPCON2_REG, 0x0000, 2 },
{ AD717X_SETUPCON3_REG, 0x0000, 2 },
{
AD717X_FILTCON0_REG,
AD717X_FILT_CONF_REG_ENHFILT(2) | AD717X_FILT_CONF_REG_ODR(10),
2
},
{
AD717X_FILTCON1_REG,
AD717X_FILT_CONF_REG_ENHFILT(2),
2
},
{
AD717X_FILTCON2_REG,
AD717X_FILT_CONF_REG_ENHFILT(2),
2
},
{
AD717X_FILTCON3_REG,
AD717X_FILT_CONF_REG_ENHFILT(2),
2
},
{ AD717X_OFFSET0_REG, 0, 3 },
{ AD717X_OFFSET1_REG, 0, 3 },
{ AD717X_OFFSET2_REG, 0, 3 },
{ AD717X_OFFSET3_REG, 0, 3 },
{ AD717X_GAIN0_REG, 0, 3 },
{ AD717X_GAIN1_REG, 0, 3 },
{ AD717X_GAIN2_REG, 0, 3 },
{ AD717X_GAIN3_REG, 0, 3 },
};
/*! Retrieves a pointer to the register that matches the given address */
ad717x_st_reg *AD717X_GetReg(ad717x_dev *device,
uint8_t reg_address);
/*! Reads the value of the specified register. */
int32_t AD717X_ReadRegister(ad717x_dev *device,
uint8_t addr);
/*! Writes the value of the specified register. */
int32_t AD717X_WriteRegister(ad717x_dev *device,
uint8_t);
/*! Reads the conversion result from the device. */
int32_t AD717X_ReadData(ad717x_dev *device,
int32_t* pData);
/*! Initializes the AD717X. */
int32_t AD717X_Init(ad717x_dev **device,
ad717x_init_param init_param);
ad717x_st_reg *AD717X_GetReg(ad717x_dev *device,
uint8_t reg_address)
{
uint8_t i;
ad717x_st_reg *reg = 0;
if (!device || !device->regs)
return 0;
for (i = 0; i < device->num_regs; i++) {
if (device->regs[i].addr == reg_address) {
reg = &device->regs[i];
break;
}
}
return reg;
}
int32_t AD717X_ReadRegister(ad717x_dev *device,
uint8_t addr)
{
int32_t ret = 0;
uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint32_t temp[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint8_t i = 0;
uint8_t check8 = 0;
uint8_t msgBuf[8] = {0, 0, 0, 0, 0, 0, 0, 0};
ad717x_st_reg *pReg;
if(!device)
return INVALID_VAL;
pReg = AD717X_GetReg(device, addr);
if (!pReg)
return INVALID_VAL;
/* Build the Command word */
buffer[0] = AD717X_COMM_REG_WEN | AD717X_COMM_REG_RD |
AD717X_COMM_REG_RA(pReg->addr);
/* Read data from the device
ret = spi_write_and_read(device->spi_desc,
buffer,
((device->useCRC != AD717X_DISABLE) ? pReg->size + 1
: pReg->size) + 1);
*/
for(i=0;i<8;i++)
{
temp[i]=buffer[i];
}
SSIDataGet(SSI0_BASE, temp);
ret = buffer[0];
if(ret < 0)
return ret;
/* Check the CRC
if(device->useCRC == AD717X_USE_CRC) {
msgBuf[0] = AD717X_COMM_REG_WEN | AD717X_COMM_REG_RD |
AD717X_COMM_REG_RA(pReg->addr);
for(i = 1; i < pReg->size + 2; ++i) {
msgBuf[i] = buffer[i];
}
check8 = AD717X_ComputeCRC8(msgBuf, pReg->size + 2);
}
if(device->useCRC == AD717X_USE_XOR) {
msgBuf[0] = AD717X_COMM_REG_WEN | AD717X_COMM_REG_RD |
AD717X_COMM_REG_RA(pReg->addr);
for(i = 1; i < pReg->size + 2; ++i) {
msgBuf[i] = buffer[i];
}
check8 = AD717X_ComputeXOR8(msgBuf, pReg->size + 2);
}
if(check8 != 0) {
/* ReadRegister checksum failed.
return COMM_ERR;
}
*/
/* Build the result */
pReg->value = 0;
for(i = 1; i < pReg->size + 1; i++) {
pReg->value <<= 8;
pReg->value += buffer[i];
}
return ret;
}
int32_t AD717X_WriteRegister(ad717x_dev *device,
uint8_t addr)
{
int32_t ret = 0;
int32_t regValue = 0;
uint8_t wrBuf[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint32_t temp[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint8_t i = 0;
uint8_t crc8 = 0;
ad717x_st_reg *preg;
if(!device)
return INVALID_VAL;
preg = AD717X_GetReg(device, addr);
if (!preg)
return INVALID_VAL;
/* Build the Command word */
wrBuf[0] = AD717X_COMM_REG_WEN | AD717X_COMM_REG_WR |
AD717X_COMM_REG_RA(preg->addr);
/* Fill the write buffer */
regValue = preg->value;
for(i = 0; i < preg->size; i++) {
wrBuf[preg->size - i] = regValue & 0xFF;
regValue >>= 8;
}
/*
*
Compute the CRC
if(device->useCRC != AD717X_DISABLE) {
crc8 = AD717X_ComputeCRC8(wrBuf, preg->size + 1);
wrBuf[preg->size + 1] = crc8;
}
*/
/* Write data to the device
ret = spi_write_and_read(device->spi_desc,
wrBuf,
(device->useCRC != AD717X_DISABLE) ?preg->size + 2 : preg->size + 1);
*/
for(i=0;i<8;i++)
{
temp[i]=wrBuf[i];
}
SSIDataPut(SSI0_BASE, temp[0]);//yet to edit which base address to use
ret=1;//if successful, then return 1 -----> yet to edit it
//UARTprintf("Write Register");
return ret;
}
int32_t AD717X_ReadData(ad717x_dev *device,
int32_t* pData)
{
ad717x_st_reg *dataReg;
int32_t ret;
if(!device || !device->regs)
return INVALID_VAL;
dataReg = AD717X_GetReg(device, AD717X_DATA_REG);
if (!dataReg)
{
UARTprintf("Test-2\n");
return INVALID_VAL;
}
/* Update the data register length with respect to device and options */
//ret = AD717X_ComputeDataregSize(device);
/* Read the value of the Status Register */
ret |= AD717X_ReadRegister(device, AD717X_DATA_REG);
/* Get the read result */
*pData = dataReg->value;
return ret;
}
int32_t AD717X_Init(ad717x_dev **device,
ad717x_init_param init_param)
{
//UARTprintf("INITIALIZATION start");
ad717x_dev *dev;
int32_t ret;
ad717x_st_reg *preg;
dev = (ad717x_dev *)malloc(sizeof(*dev));
if (!dev)
return -1;
dev->regs = init_param.regs;
dev->num_regs = init_param.num_regs;
/*
Initialize the SPI communication.
ret = spi_init(&dev->spi_desc, &init_param.spi_init);
if (ret < 0)
return ret;
*/
/*
* Reset the device interface.
ret = AD717X_Reset(dev);
if (ret < 0)
return ret;
*/
/* Initialize ADC mode register. */
ret = AD717X_WriteRegister(dev, AD717X_ADCMODE_REG);
if(ret < 0)
return ret;
/* Initialize Interface mode register. */
ret = AD717X_WriteRegister(dev, AD717X_IFMODE_REG);
if(ret < 0)
return ret;
/* Get CRC State
ret = AD717X_UpdateCRCSetting(dev);
if(ret < 0)
return ret;
*/
/*
* Initialize registers AD717X_GPIOCON_REG through AD717X_OFFSET0_REG
preg = AD717X_GetReg(dev, AD717X_GPIOCON_REG);
if (!preg)
return INVALID_VAL;
while (preg && preg->addr != AD717X_OFFSET0_REG) {
if (preg->addr == AD717X_ID_REG) {
preg ++;
continue;
}
ret = AD717X_WriteRegister(dev, preg->addr);
if (ret < 0)
break;
preg ++;
}
*/
/* Read ID register to identify the part */
ret = AD717X_ReadRegister(dev, AD717X_ID_REG);
if(ret < 0)
return ret;
*device = dev;
return ret;
}
void ConfigureUART(void)
{
//
// Enable the GPIO Peripheral used by the UART.
//
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
//
// Enable UART0
//
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
//
// Configure GPIO Pins for UART mode.
//
ROM_GPIOPinConfigure(GPIO_PA0_U0RX);
ROM_GPIOPinConfigure(GPIO_PA1_U0TX);
ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
//
// Initialize the UART for console I/O.
//
UARTStdioConfig(0, 115200, g_ui32SysClock);
UARTprintf("UART configured successfully");
}
int main(void)
{
g_ui32SysClock = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
SYSCTL_OSC_MAIN | SYSCTL_USE_PLL |
SYSCTL_CFG_VCO_480), 120000000);//Sets the clock Frequency
int32_t ret=0;
long sample;
PinoutSet(false, false);//enables the GPIO modules and configures the device pins for standard usages
//Function arguments- Ethernet and USB
ConfigureUART();
/*
#if defined(TARGET_IS_TM4C129_RA0) || \
defined(TARGET_IS_TM4C129_RA1) || \
defined(TARGET_IS_TM4C129_RA2)
uint32_t ui32SysClock;
#endif
uint32_t pui32DataTx[NUM_SSI_DATA];
uint32_t pui32DataRx[NUM_SSI_DATA];
uint32_t ui32Index;
//
// Set the clocking to run directly from the external crystal/oscillator.
// TODO: The SYSCTL_XTAL_ value must be changed to match the value of the
// crystal on your board.
//
/*
#if defined(TARGET_IS_TM4C129_RA0) || \
defined(TARGET_IS_TM4C129_RA1) || \
defined(TARGET_IS_TM4C129_RA2)
ui32SysClock = SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
SYSCTL_OSC_MAIN |
SYSCTL_USE_OSC), 25000000);
#else
SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_16MHZ);
#endif
*/
//
// Set up the serial console to use for displaying messages. This is
// just for this example program and is not needed for SSI operation.
//
//
// Display the setup on the console.
//
UARTprintf("SSI ->\n");
UARTprintf(" Mode: SPI\n");
UARTprintf(" Data: 8-bit\n\n");
//
// The SSI0 peripheral must be enabled for use.
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
//
// For this example SSI0 is used with PortA[5:2]. The actual port and pins
// used may be different on your part, consult the data sheet for more
// information. GPIO port A needs to be enabled so these pins can be used.
// TODO: change this to whichever GPIO port you are using.
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
//
// Configure the pin muxing for SSI0 functions on port A2, A3, A4, and A5.
// This step is not necessary if your part does not support pin muxing.
// TODO: change this to select the port/pin you are using.
//
GPIOPinConfigure(GPIO_PA2_SSI0CLK);
GPIOPinConfigure(GPIO_PA3_SSI0FSS);
GPIOPinConfigure(GPIO_PA5_SSI0XDAT1);
GPIOPinConfigure(GPIO_PA4_SSI0XDAT0);
//
// Configure the GPIO settings for the SSI pins. This function also gives
// control of these pins to the SSI hardware. Consult the data sheet to
// see which functions are allocated per pin.
// The pins are assigned as follows:
// PA5 - SSI0Tx - MOSI -DATA0 - GPIO_PA4_SSI0XDAT0
// PA4 - SSI0Rx - MISO -DATA1 - GPIO_PA5_SSI0XDAT1
// PA3 - SSI0Fss
// PA2 - SSI0CLK
// TODO: change this to select the port/pin you are using.
//
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_3 |
GPIO_PIN_2);
//
// Configure and enable the SSI port for SPI master mode. Use SSI0,
// system clock supply, idle clock level low and active low clock in
// freescale SPI mode, master mode, 1MHz SSI frequency, and 8-bit data.
// For SPI mode, you can set the polarity of the SSI clock when the SSI
// unit is idle. You can also configure what clock edge you want to
// capture data on. Please reference the datasheet for more information on
// the different SPI modes.
//
/*
#if defined(TARGET_IS_TM4C129_RA0) || \
defined(TARGET_IS_TM4C129_RA1) || \
defined(TARGET_IS_TM4C129_RA2)
SSIConfigSetExpClk(SSI0_BASE, ui32SysClock, SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, 1000000, 8);
#else
SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, 1000000, 8);
#endif
*/
//
// Enable the SSI0 module.
//
SSIAdvModeSet(SSI0_BASE, SSI_ADV_MODE_READ_WRITE);
SSIEnable(SSI0_BASE);
//
// Read any residual data from the SSI port. This makes sure the receive
// FIFOs are empty, so we don't read any unwanted junk. This is done here
// because the SPI SSI mode is full-duplex, which allows you to send and
// receive at the same time. The SSIDataGetNonBlocking function returns
// "true" when data was returned, and "false" when no data was returned.
// The "non-blocking" function checks if there is any data in the receive
// FIFO and does not "hang" if there isn't.
//
/* while(SSIDataGetNonBlocking(SSI0_BASE, &pui32DataRx[0]))
{
}*/
ad717x_dev my_ad717x_2;
ad717x_init_param ad717x_2_init_param;
my_ad717x_2.regs = ad7172_2_regs;
//UARTprintf("Test");
my_ad717x_2.num_regs = sizeof(ad7172_2_regs) / sizeof(ad7172_2_regs[0]);
//uint8_t temp1=sizeof(ad7172_2_regs) / sizeof(ad7172_2_regs[0]);
//UARTprintf("%d\n",temp1);
ad717x_2_init_param.regs = ad7172_2_regs;
ad717x_2_init_param.num_regs = sizeof(ad7172_2_regs) / sizeof(ad7172_2_regs[0]);
ret = AD717X_Init(&my_ad717x_2, ad717x_2_init_param);
if (ret < 0)
UARTprintf("Didn't initiliaze");
//ret = AD717X_ReadData(&my_ad717x_2, &sample);
ret = AD717X_ReadRegister(&my_ad717x_2,AD717X_DATA_REG);
UARTprintf("%d\n",ret);
UARTprintf("\n-----THE END----");
/*
//
// Initialize the data to send.
//
pui32DataTx[0] = 's';
pui32DataTx[1] = 'p';
pui32DataTx[2] = 'i';
//
// Display indication that the SSI is transmitting data.
//
UARTprintf("Sent:\n ");
//
// Send 3 bytes of data.
//
for(ui32Index = 0; ui32Index < NUM_SSI_DATA; ui32Index++)
{
//
// Display the data that SSI is transferring.
//
UARTprintf("'%c' ", pui32DataTx[ui32Index]);
//
// Send the data using the "blocking" put function. This function
// will wait until there is room in the send FIFO before returning.
// This allows you to assure that all the data you send makes it into
// the send FIFO.
//
SSIDataPut(SSI0_BASE, pui32DataTx[ui32Index]);
}
//
// Wait until SSI0 is done transferring all the data in the transmit FIFO.
//
while(SSIBusy(SSI0_BASE))
{
}
//
// Display indication that the SSI is receiving data.
//
UARTprintf("\nReceived:\n ");
//
// Receive 3 bytes of data.
//
for(ui32Index = 0; ui32Index < NUM_SSI_DATA; ui32Index++)
{
//
// Receive the data using the "blocking" Get function. This function
// will wait until there is data in the receive FIFO before returning.
//
SSIDataGet(SSI0_BASE, &pui32DataRx[ui32Index]);
//
// Since we are using 8-bit data, mask off the MSB.
//
pui32DataRx[ui32Index] &= 0x00FF;
//
// Display the data that SSI0 received.
//
UARTprintf("'%c' ", pui32DataRx[ui32Index]);
}
//
// Return no errors
*/
return(0);
}
