AnsweredAssumed Answered

ADV7511W - no activity seen on TMDS channels

Question asked by deep.traana on Feb 6, 2018
Latest reply on Mar 19, 2018 by deep.traana

ADV7511W is showing no activity on the TMDS channels 0,1 and 2 - though the TXC clock signal is as expected.  The IC is identifying the input video correctly as per registers 0x3E.  In our design we need to transmit only the Video data on the HDMI interface - no HDCP encryption required - no audio data is available.  Consequently, we have tied all the audio input signals to ground - as recommended by the HW Guide.  The IC is reading the EDID data from the display device correctly.

We have tried to configure the audio input to SPDIF - but this did not help.


Attached is the relevant part of the schematic.

Here below are the register values that have been programmed.


[hdmi_dump_reg] Reg(0x0): 0x13
[hdmi_dump_reg] Reg(0x41): 0x10
[hdmi_dump_reg] Reg(0x98): 0x3
[hdmi_dump_reg] Reg(0x1): 0x0
[hdmi_dump_reg] Reg(0x2): 0x18
[hdmi_dump_reg] Reg(0x3): 0x0
[hdmi_dump_reg] Reg(0x15): 0x0
[hdmi_dump_reg] Reg(0x16): 0x0
[hdmi_dump_reg] Reg(0x18): 0x46
[hdmi_dump_reg] Reg(0x40): 0x80
[hdmi_dump_reg] Reg(0x41): 0x10
[hdmi_dump_reg] Reg(0x48): 0x0
[hdmi_dump_reg] Reg(0x4C): 0x4
[hdmi_dump_reg] Reg(0x55): 0x0
[hdmi_dump_reg] Reg(0x56): 0x8
[hdmi_dump_reg] Reg(0x96): 0xF4
[hdmi_dump_reg] Reg(0x98): 0x3
[hdmi_dump_reg] Reg(0x9A): 0xE0
[hdmi_dump_reg] Reg(0x9C): 0x30
[hdmi_dump_reg] Reg(0x9D): 0x61
[hdmi_dump_reg] Reg(0xA2): 0xA4
[hdmi_dump_reg] Reg(0xA3): 0xA4
[hdmi_dump_reg] Reg(0xAF): 0x6
[hdmi_dump_reg] Reg(0xBA): 0x60
[hdmi_dump_reg] Reg(0xDE): 0x9C
[hdmi_dump_reg] Reg(0xE4): 0x60
[hdmi_dump_reg] Reg(0xFA): 0x7D
[hdmi_dump_reg] Reg(0x42): 0xF0
[hdmi_dump_reg] Reg(0x48): 0x0
[hdmi_dump_reg] Reg(0x4B): 0x40
[hdmi_dump_reg] Reg(0x3E): 0x10
[hdmi_dump_reg] Reg(0x3F): 0x0
[hdmi_dump_reg] Reg(0xE0): 0xD0
[hdmi_dump_reg] Reg(0xF9): 0x0
[hdmi_dump_reg] Reg(0xA1): 0x0
[hdmi_dump_reg] Reg(0x3D): 0x4
[hdmi_dump_reg] Reg(0xC8): 0x2
[hdmi_dump_reg] Reg(0x95): 0x0
[hdmi_dump_reg] Reg(0x97): 0x0
[hdmi_dump_reg] Reg(0x9E): 0x12
[hdmi_dump_reg] Reg(0x4): 0x0
[hdmi_dump_reg] Reg(0xA): 0x11
[hdmi_dump_reg] Reg(0xB): 0x8E
[hdmi_dump_reg] Reg(0xC): 0x80
[hdmi_dump_reg] Reg(0xC8): 0x2
[hdmi_dump_reg] Reg(0xAF): 0x6
[hdmi_dump_reg] Reg(0xC8): 0x2