FAQ: ADIS16209/ADIS16265 Pb-free Assembly Tips

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Please visit the following link for an updated set of assembly instructions:

FAQ: ADIS162xx LGA Assembly Guidelines


Start of older assembly instructions, for historical reference but not for present use>>

Q:

Do you have any tips to offer for PB-free, solder-reflow assembly on LGA iSensor devices, such as the ADIS16209 or ADIS16265?

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A:

The iSensor devices, which come in LGA package styles, support standard Pb-free, solder-reflow assembly techniques. When designing an assembly process flow, please keep the following things in mind, which seem to be the most common themes associated with low-yields through PCB-level assembly operations.

  1. Moisture ingression prior to solder reflow.. While some of the ADIS16xxx devices fall under MSL3, all of the ADIS1620x and ADIS1626x devices are classified as MSL5, per JEDEC J-STD-033.  These devices are stored and shipped in compliant (per JEDEC) trays, which are vacuum-sealed with moisture absorbing materials, inside of an anti-static bag. J-STD-033 describes the floor life (time between bag opening and solder reflow), environment (temperature, humidity) and pre-reflow bake requirements.  If these parameters are not well-controlled, baking these devices for 24-48 hours at +125°C, inside of a dry oven (nitrogen), will help remove any residual moisture and reduce its impact on assembly yields. J-STD-033 is available for download at http://www.jedec.org/standards-documents.
  2. Solder-reflow time/temperature profile.  These devices have been qualified to support the Pb-free solder reflow profile in J-STD-020. Prior to running parts through an oven, use an accurate thermocouple, placed at the DUT on the PCB, to verify compliance with the reflow profile in J-STD-020. J-STD-020 is available for download at: http://www.jedec.org/standards-documents.
    1. NOTE: The maximum temperature has a height condition in these specifications. For the ADIS1620x and ADIS1626x products, this places the maximum temperature at +250C, not +260C.
  3. Peeling stress can cause device leads to fracture. This is a common sensitivity for LGA and BGA packages.  A common cause of peeling stress is PCB separation techniques, which causes the PCB to bend and places the lead interfaces in "tension." Cracks in these lead interfaces can cause poor yield and premature failures in service, so this is an important consideration.  There are two parts to managing this risk: optimize lead strength and protect the leads from peeling stress. Here are tips in optimizing the solder joint quality:

Protecting the leads can involve the following:

    • ADIS16xxx boards (such as ADIS16209/PCBZ) use a rotating bit to cut boards out of the arrays, after the solder reflow step.
    • PCB design: break-point size, break point proximity to ADIS16xxx device, mounting hole location, thickness, width, length and material rigidity; along with device proximity to natural bend points, can impact exposure to peeling stress.
    • Clamp PCB ends during separation
    • Use of an underfill compound to help distribute peeling stress across the entire bottom of the package. The following materials, provided by Hysol, have been used with success: FP4470, FP4545FC, FC4502, and FP4548.  The following tips may help in developing an under-fill process:
      • Pre-heat the PCB to +90°C, to help the material whick under the ADIS16265's package bottom.
      • Deposit under-fill material on two adjacent edges of the ADIS16265 and allow the material to wick under the package, for approximately 30 minutes
      • Bake at +125°C for 30 minutes to help the material set
      • Bake at +160°C for 90 minutes to fully cure the material

This information applies to all iSensor BGA and LGA devices: ADIS16003, ADIS16006, ADIS16060, ADIS16201, ADIS16203, ADIS16204, ADIS16209, ADIS16220, ADIS16240, ADIS16260, ADIS16265 and ADIS16266.

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