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MEMS Inertial Sensors
MEMS Inertial Sensors
Documents FAQ: ADIS16209/ADIS16265 Lead Integrity
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  • +Documents
  • +3-D Model/STEP: FAQ
  • +AD22282-A-R2: FAQ
  • +ADIS16000: FAQ
  • +ADIS16003 MTBF: FAQ
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    • FAQ: ADIS162xx LGA Assembly Guidelines
    • FAQ: ADIS16209 Evaluation Tool Overview
    • FAQ: ADIS16209 Self-Test Management
    • FAQ: ADIS16209/ADIS16265 Lead Integrity
    • FAQ: ADIS16209/ADIS16265 Pb-free Assembly Tips
    • FAQ: ADIS1620x/21x/22x Power Regulator Suggestion
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    • Bias Stability over 1 Year
    • IMU Evaluation Software Bug: ADIS16209 Data Capture
    • The direction of axis X and axis Y
    • ADIS16201 and ADIS16209 Pins 8 and 10 Grounded - Performance Issues
    • ADIS16209 Datasheet Error: Address code length
    • ADIS16209 Datasheet Error; SPI Address Code Missing MSB
    • ADIS16209 Datecode Revision Change
    • ADIS16209 self-test
    • ADIS16209: How do I connect pins 7,8,10,11? There are contradictions in datasheet.
    • ADIS16209: Stability and sensitivity
    • ADIS1620x Evaluation Board dimensions
  • +ADIS16210: FAQ
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  • +Test Procedures: FAQ

FAQ: ADIS16209/ADIS16265 Lead Integrity

UPDATE ALERT!

Please visit the following link for an updated set of assembly instructions:

FAQ: ADIS162xx LGA Assembly Guidelines

 

Start of older assembly instructions, for historical reference but not for present use>>

Q:

What is causing my ADIS16209 leads to fracture or crack on my PCB?

A:

--------------------------------------------------------------------------------------------------------

Without knowing specific details of any particular case, we can offer that this is most often caused by PCB bending, which places peeling stress on one or more of the leads. From our experience, the two most common causes of PCB bending are in the array separation process (after array-level processing is complete) and in drop testing (in-system).  While the bending stress associated with score and snap operations may seem to be very small, the ADIS16209's rigid structure (for best physical stability while in normal operation) and small leads do not provide a large amount of adhesion strength either.  Keep in mind, this is not a matter of device quality, but a matter of physics.

Fortunately, there are two things that can be done to help address this sensitivity.

  1. Employ a low-stress array separation technique.  For example, we use a router bit to cut finished PCB out of their arrays for our evaluation boards, such as the ADIS16209/PCBZ. This process has helped produce over 3000 boards with very high yields.
  2. Use an under-fill material to spread peeling stress across the entire ADIS16209 package bottom.

SUGGESTIONS FOR ADDITIONAL READING:

Use of under-fill materials, for the purpose of strengthening BGA and LGA interfaces:

http://www.embedded.com/design/system-integration/4235387/Underfill-revisited--How-a-decades-old-technique-enables-smaller--more-durable-PCBs

The impact array separation techniques have on ceramic capacitors:

http://www.smtinline.com/html-en/cap-failure.html

For more detailed information on ADIS16xxx LGA assembly, check out the following post:

http://ez.analog.com/docs/DOC-2962

Hope that helps everyone!

Best,

NevadaMark

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