The recommended steps for reading the MAX30009 FIFO are:
1. Read and clear all status registers. (Note: The Status 1 register is automatically cleared upon reading.)
2. Check the relevant status bits (A_FULL or FIFO_DATA_RDY).
3. Read the FIFO_DATA_COUNT register.
4. Read the FIFO_DATA register based on the value in FIFO_DATA_COUNT.
You may be able to skip reading the status registers and the FIFO_DATA_COUNT register. If the FIFO_STAT_CLR bit is set to 1, reading the FIFO_DATA register will automatically clear both the A_FULL and FIFO_DATA_RDY status bits.
However, omitting the FIFO_DATA_COUNT read is only advisable if you are certain that the FIFO contains a fixed, known number of samples at each read interval (e.g., every 1 ms). Otherwise, you risk reading an incorrect or incomplete set of data.
Following the full recommended sequence ensures robust and reliable data acquisition from the MAX30009, especially in dynamic or unpredictable sampling conditions. While simplifications can reduce I2C traffic, they should only be applied when the system behavior is well-characterized and consistent. If you want to just read the FIFO_DATA directly (skipping the other steps), it is recommend that you validate your system with real-world testing to avoid data loss or misinterpretation.