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ADXL372 external synchronization

Hello

Our customer will use ADXL372 at external sync (2000Hz) and internal clock (ODR=3200 Hz setting).

Datasheet rev.0 P24  "SYNCHRONIZED DATA SAMPLING" says below.

"

The EXT_SYNC is an active high signal. Due to the asynchronous
nature of the internal clock and external sync, there may be a
one ODR clock cycle difference between consecutive external sync
pulses. "

Question

What does one ODR clock cycle difference  mean ?

I think  that  ADXL372  outputs date at 1/3200 second after sync (every 1/2000 second )

when SYNC is 2000Hz and ODR setting is3200Hz (internal clock ).

Please let me know your advice how  "one ODR clock cycle difference" affects ADXL372 operation .

Regards,

Terumasa

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  • Hi -san, 

    What I have meant to say is that if you have an external sync, the ODR would not be equal to 3200 Hz even though that you have it in the internal clock. 

    The 3200 Hz internal clock is disregarded while the EXT_SYNC signal is the one that dictates the ODR. 

    Referring to the second slide, it would mean that the next EXT_SYNC pulse after the first one would be delayed by one ODR clock cycle. This means to say that it would be delayed by one period. 

    Regards, 

    JP

Reply
  • Hi -san, 

    What I have meant to say is that if you have an external sync, the ODR would not be equal to 3200 Hz even though that you have it in the internal clock. 

    The 3200 Hz internal clock is disregarded while the EXT_SYNC signal is the one that dictates the ODR. 

    Referring to the second slide, it would mean that the next EXT_SYNC pulse after the first one would be delayed by one ODR clock cycle. This means to say that it would be delayed by one period. 

    Regards, 

    JP

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