ADIS16460 SYNC

hi

i am thinking to use the adis16460 with external clock to synchronize it with my control loop (Direct Sample Control MODE), i will be happy if you can please explain me about how this effects system performance  as i came across the next line: 

"The sync input clock functions below the specified minimum value but at reduced performance levels" ?

i am planning to provide a 2kHz clock signal, so i assume that the low pass filter configuration (as seen in figure 29) will be all most the same as 2KHZ is very close to the default 2048Hz , is that assumption correct?

best regards

Mark

  • 0
    •  Analog Employees 
    on Aug 29, 2016 11:54 PM over 4 years ago

    One clarification: is the checksum correct each time?  I had asked about the CRC, but that relates to another product.  Sorry about that!

  • 0
    •  Analog Employees 
    on Aug 30, 2016 1:21 AM over 4 years ago

    I was able to speak to our team and they have affirmed that the best performance (including data ready stability) is going to require synchronous data acquisition (using data ready).  As a result of our discussion with you, we are planning to conduct a careful review of the datasheet, with the intent to identify the most effective way to offer this as a "preferred approach," rather than an option.  We sincerely appreciate you sharing your experience with us on this matter and hope that our feedback was valuable. 

  • hi Mark

    thank you very much for the fast reply

    regarding your questions:

    - yes i have used the default MSC_CTRL[0] = 1 setting.

    - i am having errors with check sum, i have added a counter that counts up every time there is an error:

    if i use 2khz burst mode to sample the gyro i am getting all most 40 errors per second! , if i lower the sampling time the error count decrease but the errors still exist .

    assuming i didnt do any errors in my checkout i understand from you that i cant use the burst mode without any synchronization?

     

    best regards

    Mark

  • 0
    •  Analog Employees 
    on Aug 30, 2016 5:32 PM over 4 years ago

    If you want the best performance available, we do recommend that you synchronize your data acquisition with the data-ready signal.  If you want to control the sample rate, then we also recommend providing a sync input signal, while also setting the MSC_CTRL register to support this mode of operation.

  •  my first intention was to provide an external clock signal and then do the synchronization based on my clock (without using the DR pin) as my assumption was that if my clock frequency is constant the time to sample will also be constant , but from what i have  seen and understand from your reply's there is no chance of doing so as the act of reading the adis output registers influence the next time the data will be ready am i correct?

    by the way , what is happening if i am reading the registers at time the DR pin is low , am i getting the old sample data?