I'm on implementation of a driver for a targeted platform.
ADXL345 is working well with SPI 4 wires-mode full-duplex (both reading and writing).
But I cannot make it work perfectly with SPI 3 wires-mode half-duplex (writing is OK, reading is not).
The specification (datasheet) is not really clear for SPI 3 wires-mode (attached image).
Was there anyone on implementation with SPI 3 wires-mode halt duplex please?
It must be great if any sample source code as well.
Thanks a lot.
Duy P. Nguyen
The datasheet on page 15, left column, second paragraph that a 10k resistor be placed between VddI/O and SDO, or from GND and SDO.
Just curious. If you have everything working in 4wire mode, why switch to 3wire?
So sorry that I cannot reply so soon.
Your help is really nice.
It was my mistake in making it works for my target platform.
For 3 wire mode, I just want to give out another option if any limitation of HW.
The question was not answered, I also need this information.