EVAL-AD5940ELCZ Fast Chronoamperometry

Hi, Akila .

Can your team please help look into this query?

Regards,
Jo

Hi,
Did not get a response to the query...??

Modified Chronoamperometric example to configure HSDAC+HSTIA for transient measurement. Able to get 800KSPS ODR (ADCRATE_1P6MHZ ,ADCSINC3OSR_2).

1.When tested with 1nf+4.7Kohm RC for 1ms pulse length, got 800 samples. But if changing pulse length to 2ms, not printing any data on console.

ADCRATE_1P6MHZ ,ADCSINC3OSR_2 1mspulse -> DataCount: 803  no values when 2ms pulse

ADCRATE_1P6MHZ ,ADCSINC3OSR_4 1mspulse -> DataCount: 402, 2mspulse ->DataCount: 802 no values when 3ms pulse

same with ADCSINC3OSR_5 when pulselength is morethan 3ms, no values. In ISR fifocnt is zero. Why it is?

1) Datacount = (PulseLength_in_ms)*800/ADCSinc2Osr/ADCSinc3Osr;

Max data count = 1024 as data FIFO size is 4kB .

If ADCSinc2Osr = 1333, ADCSinc3Osr = 5,

Datacount is 1024 for pulse length of 8.5 secs.

Hence you may measure for pulse length upto 8.5 seconds.

If Sinc filters need to be bypassed,

you may set datacount = x.

Pulselength would be "waitclks" (derived from datacount =x) in ms. 

 2) You can see the output even when pulse is not fully completed. 

This happens if fifothreshold is set smaller than datacount. 

VBias and Vzero are restored in code only after Pulse length duration is completed.

3) LPDAC can source the data from waveform generator:

lp_loop.LpDacCfg.LpDacSrc = LPDACSRC_WG;

where DAC update rate is set by:

HsDacCfg.HsDacUpdateRate = 7;       /* DAC update rate equals to WG_CLK/HsDacUpdateRate*/

Reference: ad5940-examples/examples/AD5940_WG at master · analogdevicesinc/ad5940-examples · GitHub

Hi,

As i mentioned earlier,

Kala said:

modified code

1.we are using HSDAC to apply pulse, and want to update DAC at user defined slope rate which is v/s. How to set it using HsDacUpdateRate?

2. In the modified code given,

AD5940_WriteReg(REG_AFE_HSDACDAT, hs_hi);
AD5940_SEQGenInsert(SEQ_WAIT(WaitClks));
AD5940_AFECtrlS(AFECTRL_ADCPWR | AFECTRL_ADCCNV, bFALSE);
/* Return HSDAC to midscale and stop ADC */
AD5940_WriteReg(REG_AFE_HSDACDAT, hs_mid);

AD5940_AFECtrlS(AFECTRL_HSTIAPWR | AFECTRL_WG | AFECTRL_DACREFPWR | AFECTRL_HSDACPWR | AFECTRL_INAMPPWR | AFECTRL_EXTBUFPWR, bFALSE);

setting all AFECTRLs to False, once conversion is done. Is it the reason for not getting correct bias?

Thank you

DAC update rate is set by 8 bit value:

You may fetch input byte from user and set HsDacUpdateRate.

Hi,

1. I’m having difficulty understanding this part. Could you please explain it more clearly or with an example how it works to set v/s slope given by user?

2.To measure OCP,  AD5941 Potentiometry Basic Example and OCP Basic Example, it is given VRE0, VSE0 wrt VZERO0. Measuring OCP (Open Circuit Potential) of a 3 electrode system, here it is given wrt ADCMUXN_VSET1P1. When exactly to use vzero0 and vset1p1??

float App_OCP(void)
{
  uint32_t afeResult;
  float V_RE0, V_SE0;

  SWMatrixCfg_Type sw_cfg;

  sw_cfg.Dswitch=SWD_OPEN;
  sw_cfg.Pswitch=SWP_RE0;
  sw_cfg.Nswitch=SWN_SE0;
  sw_cfg.Tswitch = SWT_TRTIA | SWT_SE0LOAD;

  AD5940_SWMatrixCfgS(&sw_cfg);

    /*Measure VSE*/
  //AD5940_ADCMuxCfgS(ADCMUXP_VSE0, ADCMUXN_VSET1P1);
  AD5940_ADCMuxCfgS(ADCMUXP_VSE0, ADCMUXN_VZERO0);
  AD5940_AFECtrlS(AFECTRL_ADCPWR /*| AFECTRL_SINC2NOTCH*/, bTRUE);
  AD5940_Delay10us(16 * 25);
  AD5940_AFECtrlS(AFECTRL_ADCCNV, bTRUE); /* Start ADC convert*/
  while (!(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ADCRDY)))
    ;
  AD5940_INTCClrFlag(AFEINTSRC_ADCRDY);
  afeResult = AD5940_ReadAfeResult(AFERESULT_SINC3);
  AD5940_AFECtrlS(AFECTRL_ADCPWR | AFECTRL_ADCCNV /*| AFECTRL_SINC2NOTCH*/, bFALSE); /* Stop ADC */
  V_SE0 = AD5940_ADCCode2Volt(afeResult & 0xffff, ADCPGA_1, 1.82);

  /*Measure VRE*/
  //AD5940_ADCMuxCfgS(ADCMUXP_VRE0, ADCMUXN_VSET1P1);
  AD5940_ADCMuxCfgS(ADCMUXP_VRE0, ADCMUXN_VZERO0);
  AD5940_AFECtrlS(AFECTRL_ADCPWR /*| AFECTRL_SINC2NOTCH*/, bTRUE);
  AD5940_Delay10us(16 * 25);
  AD5940_AFECtrlS(AFECTRL_ADCCNV, bTRUE); /* Start ADC convert*/
  while (!(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ADCRDY)))
    ;
  AD5940_INTCClrFlag(AFEINTSRC_ADCRDY);
  afeResult = AD5940_ReadAfeResult(AFERESULT_SINC3);
  AD5940_AFECtrlS(AFECTRL_ADCPWR | AFECTRL_ADCCNV /*| AFECTRL_SINC2NOTCH*/, bFALSE); /* Stop ADC */
  V_RE0 = AD5940_ADCCode2Volt(afeResult & 0xffff, ADCPGA_1, 1.82);

  return (V_SE0 - V_RE0);
}

wrt VZERO0, results are as below
OCP=-0.1539 V 
OCP=-0.1544 V 
OCP=-0.1532 V 
OCP=-0.1449 V 
OCP=-0.1540 V 
OCP=-0.1539 V 
OCP=-0.1529 V 
OCP=-0.1552 V 
OCP=-0.1535 V 
OCP=-0.1551 V 
OCP=-0.1532 V 
OCP=-0.1550 V 
OCP=-0.1543 V 
OCP=-0.1553 V 
OCP=-0.1545 V 
OCP=-0.1557 V 
OCP=-0.1547 V 
OCP=-0.1552 V 
OCP=-0.1543 V 
OCP=-0.1556 V 

wrt VSET1P1
OCP=-0.4020 V 
OCP=-0.4303 V 
OCP=-0.4166 V 
OCP=-0.4314 V 
OCP=-0.4346 V 
OCP=-0.4293 V 
OCP=-0.4475 V 
OCP=-0.4209 V 
OCP=-0.5000 V 
OCP=-0.3882 V 
OCP=-0.4947 V 
OCP=-0.4169 V 
OCP=-0.4478 V 
OCP=-0.5628 V 
OCP=-0.4950 V 
OCP=-0.4123 V 
OCP=-0.4752 V 
OCP=-0.3938 V 
OCP=-0.4337 V 
OCP=-0.4250 V 

3.Want to use external rtia.

On EVAL-AD5940ELCZ, as you have mentioned here EXT DISCRETES, desired external resistance should be placed in RTIA1/RTIA2/RTIA3 right? According to data sheet, it should be connected between DE0 and AINx, but in schematic it is between AIN0 and AIN1/2/3. How to connect HS external rtia and what should be the switch matrix config?

Thankyou

1) Custom examples cannot be provided on this forum. Kindly contact ADI marketing team on mail for support.

2) Vzero and Vset1p1 are explained below:

3) Kindly refer to datasheet for details:

Hi,

1.We have already mailed for support, no response for some clarification regarding FIFO buffer in AD5940....

I am not asking you to give full custom code, At least you can explain how it works the flow if user want to set dac slope. I have understood that DAC update rate will give update frequency of dac by that we can get update time... what about voltage?

2.If we are uisng lpdac for pulse generation or vzero as HstiaBias when using hsdac then we have to use measure wrt vzero and if hstiabias is HSTIABIAS_1P1 then vset1p1? is my understanding correct?

3.We have set registers as per datasheet, what about hardware placement of external rtia?????

here in one of the post you mentioned to connect external rtia is rtia3 if AIN1 input is used.

i)In data sheet it is mentioned that "When DE0RESCON = 0x97, the RLOAD_DE0 and RTIA_DE0 resistors are short circuit",

but in driver 

#define HSTIADERLOAD_0R             0     /**< set bit[2:0] to 0x00 */

1) You have to decide the DAC voltage that you want to set based on user input. It is specific to your application.

2) yes

3) Could you please first check if you are getting internal RTIA value correctly obtained by calling AD5940_HSRtiaCal()

Hi,

Yes, with AD5940_HSRtiaCal() we are able to get correct internal RTIA calibrated values. But when calibrating external rtia,

Kala said:

RtiaVal : 1000000
HSTIARTIA: Mag:12881.778320 Ohm
DE0RESCON : 97

This is the output we are getting.

1. Register configurations are correct as mentioned in the Datasheet. Can you confirm if hardware placement of external RTIA is correct like mentioned below?

Kala said:

here in one of the post you mentioned to connect external rtia is rtia3 if AIN1 input is used.

2. Switch configurations? Any modifications while calibrating external rtia in AD5940_HSRtiaCal()???

where are we going wrong that we are not able to get correct calibrated values for exteral rtia?

Thank you

Hi Akila 

Any update on this?

Hi Akila,

Any update on External RTIA Calibration?? followed everything as given in DATASHEET. Verified the configurations set, by reading the registers DE0RESCON and HSTIARTIA. still not able to get correct calibrated value....

Hi Akila,

Any update on External RTIA Calibration?? followed everything as given in DATASHEET. Verified the configurations set, by reading the registers DE0RESCON and HSTIARTIA. still not able to get correct calibrated value....