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Measurement mode entry requirements

Category: Hardware
Product Number: ADXL367

Hi there,

We are attempting to interface with the ADXL367 accelerometer: Our application requires the accelerometer to be in Measurement Mode, with a sample-rate of 100Hz and measurement range of +-8g. At this stage, no activity or inactivity detection is required. The internal FIFO is also not used.

We are currently able to put the accelerometer into Wake-Up Mode (with sample rate of 12.5Hz). However, when attempting to put the device into Measurement Mode the ERR_USER_REGS bit is set in the STATUS register.

The following is our initialisation process. I have also included a screenshot of our hardware configuration for reference.

The device DEVID_AD, DEVID_MST, PART_ID, REV_ID, and SERIAL_NUMBER all read as their reset value.

Are you able to provide the initialisation process required for the device to enter measurement mode?

Happy to provide further information if needed.

Thanks,

Lachlan

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  • Hello  thanks for the comprehensive explanation!

    Does the ERR_USER_REGS switchs exactly when you change to measurement mode?

    Here you have a snippet of a basic initialization of the FIFO just as an example:



    hope this helps,

    Mario SM

  • Thanks for your reply Mario,

    The ERR_USER_REGS bit does appear to switch when we change to measurement mode.

    status_pre is 0x40, which corresponds to the AWAKE bit being set in the STATUS register.

    The status_post variable is 0xC0, which corresponds to both AWAKE and ERR_USER_REGS being set.

    With WAKEUP mode enabled ( accel_spi_write(0x2D, 0x08 | 0x02) ), the ERR_USER_REGS bit is not set and the device produces data-ready interrupts every ~12.5Hz

    I've not looked into configuring the FIFO buffer. Do you think this is necessary if we only use the data-ready interrupt?

    Thanks,

    Lachlan

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  • Thanks for your reply Mario,

    The ERR_USER_REGS bit does appear to switch when we change to measurement mode.

    status_pre is 0x40, which corresponds to the AWAKE bit being set in the STATUS register.

    The status_post variable is 0xC0, which corresponds to both AWAKE and ERR_USER_REGS being set.

    With WAKEUP mode enabled ( accel_spi_write(0x2D, 0x08 | 0x02) ), the ERR_USER_REGS bit is not set and the device produces data-ready interrupts every ~12.5Hz

    I've not looked into configuring the FIFO buffer. Do you think this is necessary if we only use the data-ready interrupt?

    Thanks,

    Lachlan

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