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ADXL357 V1P8ANA and V1P8DIG Decoupling

Category: Datasheet/Specs
Product Number: ADXL357

In the ADXL357BEZ Rev A datasheet and on the product page's example circuit, the load on the V1P8ANA and V1P8DIG pins is a 0.1uF in parallel with a 1.0 uF capacitor.

However, the example circuit in the Rev C datasheet shows a 0.1uF capacitor in parallel with 100 K ohm resistor. There is wording that explains why the 100 K should be added:

"It is also highly recommended to help the LDO discharge properly by adding external resistors of approximately 100 kΩ between the LDO outputs (V1P8ANA and V1P8DIG) and ground (0 V), especially when power cycling at temperatures below −20℃."

Does there still need to be a 1 uF capacitor on the LDO outputs? Or has the internal regulator itself changed so that it is no longer required?

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  • Hello  

    The 1 uF is not needed anymore as we have discarded its use after some testing subsequent to Rev A release. (you should be fine with the 0.1 uF caps with relatively stable ground)

    Hope this solves your doubt,

    Mario SM

  • Thank you for your answer MarioSM. In that same area of the Rev C datasheet, there is also some text about a 200 ms restart time that isn't in the Rev A datasheet:

    "When power cycling the ADXL356/ADXL357/ADXL357B, it is highly recommended to fully discharge the device to ground level (VSUPPLY and VDDIO = 0 V), for at least 200 ms, on each power cycle"

    Is it known what failure mode can happen if there is not a 200 ms restart time at cold temperatures? I have an existing design without that kind of POR circuitry. I'm wondering how big of a deal it is and if I need to change it.

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  • Thank you for your answer MarioSM. In that same area of the Rev C datasheet, there is also some text about a 200 ms restart time that isn't in the Rev A datasheet:

    "When power cycling the ADXL356/ADXL357/ADXL357B, it is highly recommended to fully discharge the device to ground level (VSUPPLY and VDDIO = 0 V), for at least 200 ms, on each power cycle"

    Is it known what failure mode can happen if there is not a 200 ms restart time at cold temperatures? I have an existing design without that kind of POR circuitry. I'm wondering how big of a deal it is and if I need to change it.

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