1) When I read both the EX_ADC_H and EX_ADC_L registers, the EX_ADC_L register is always zero, it does not seem to be doing a 14 bit conversion.
I have enabled the ADC_EN bit in the ADC_CTL and waited long enough for the conversion, even checking the DATA ready bit in the status register.
2) I also assume that the ADC LSB is 1V / 2^14, so why is the register sign extended? It should always be a positive number right?
3) The EVAL-ADXL367 schematic shows a 1uF cap of the Vs line pin 10 and no 0.2uF recommended cap on the VREG_OUT pin 9, why is that?
Thanks for your help